Datasheet

56F8037/56F8027 Data Sheet, Rev. 8
86 Freescale Semiconductor
5.6.7.5 ADC B Conversion Complete Interrupt Priority Level
(ADCB_CC IPL)—Bits 5–4
This field is used to set the interrupt priority level for the ADC B Conversion Complete IRQ. This IRQ is
limited to priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.7.6 ADC A Conversion Complete Interrupt Priority Level
(ADCA_CC IPL)—Bits 3–2
This field is used to set the interrupt priority level for the ADC A Conversion Complete IRQ. This IRQ is
limited to priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.7.7 Programmable Interval Timer 2 Interrupt Priority Level
(PIT2 IPL)—Bits 1–0
This field is used to set the interrupt priority level for the Programmable Interval Timer 2 IRQ. This IRQ
is limited to priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.8 Vector Base Address Register (VBA)
Figure 5-10 Vector Base Address Register (VBA)
5.6.8.1 Reserved—Bits 15–14
This bit field is reserved. Each bit must be set to 0.
Base + $7
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0
VECTOR_BASE_ADDRESS
Write
RESET
1
1. The 56F8037 resets to a value of 0x0000. This corresponds to reset addresses of 0x000000.
The 56F8027 resets to a value of 0x0080. This corresponds to reset addresses of 0x004000.
000000 0 0 00000000