Datasheet

56F8037/56F8027 Data Sheet, Rev. 8

60 Freescale Semiconductor

Table 4-15 Computer Operating Properly Registers Address Map

(COP_BASE = $00 F120)

COP_CTRL $0 Control Register

COP_TOUT $1 Time-Out Register

COP_CNTR $2 Counter Register

Table 4-16 Clock Generation Module Registers Address Map

(OCCS_BASE = $00 F130)

OCCS_CTRL $0 Control Register

OCCS_DIVBY $1 Divide-By Register

OCCS_STAT $2 Status Register

Reserved

OCCS_OCTRL $5 Oscillator Control Register

OCCS_CLKCHK $6 Clock Check Register

OCCS_PROT $7 Protection Register

Table 4-17 Power Supervisor Registers Address Map

(PS_BASE = $00 F140)

PS_CTRL $0 Control Register

PS_STAT $1 Status Register

Reserved

Table 4-18 GPIOA Registers Address Map

(GPIOA_BASE = $00 F150)

Address Offset Register Description

GPIOA_PUPEN $0 Pull-up Enable Register

GPIOA_DATA $1 Data Register

GPIOA_DDIR $2 Data Direction Register

GPIOA_PEREN $3 Peripheral Enable Register

GPIOA_IASSRT $4 Interrupt Assert Register

GPIOA_IEN $5 Interrupt Enable Register

GPIOA_IPOL $6 Interrupt Polarity Register