Datasheet

Peripheral Memory-Mapped Registers

56F8037/56F8027 Data Sheet, Rev. 8

Freescale Semiconductor 55

TMRB1_LOAD $13 Load Register

TMRB1_HOLD $14 Hold Register

TMRB1_CNTR $15 Counter Register

TMRB1_CTRL $16 Control Register

TMRB1_SCTRL $17 Status and Control Register

TMRB1_CMPLD1 $18 Comparator Load Register 1

TMRB1_CMPLD2 $19 Comparator Load Register 2

TMRB1_CSCTRL $1A Comparator Status and Control Register

TMRB1_FILT $1B Input Filter Register

Reserved

TMRB2_COMP1 $20 Compare Register 1

TMRB2_COMP2 $21 Compare Register 2

TMRB2_CAPT $22 Capture Register

TMRB2_LOAD $23 Load Register

TMRB2_HOLD $24 Hold Register

TMRB2_CNTR $25 Counter Register

TMRB2_CTRL $26 Control Register

TMRB2_SCTRL $27 Status and Control Register

TMRB2_CMPLD1 $28 Comparator Load Register 1

TMRB2_CMPLD2 $29 Comparator Load Register 2

TMRB2_CSCTRL $2A Comparator Status and Control Register

TMRB2_FILT $2B Input Filter Register

Reserved

TMRB3_COMP1 $30 Compare Register 1

TMRB3_COMP2 $31 Compare Register 2

TMRB3_CAPT $32 Capture Register

TMRB3_LOAD $33 Load Register

TMRB3_HOLD $34 Hold Register

TMRB3_CNTR $35 Counter Register

TMRB3_CTRL $36 Control Register

TMRB3_SCTRL $37 Status and Control Register

TMRB3_CMPLD1 $38 Comparator Load Register 1

TMRB3_CMPLD2 $39 Comparator Load Register 2

TMRB3_CSCTRL $3A Comparator Status and Control Register

TMRB3_FILT $3B Input Filter Register

Reserved

Table 4-10 Quad Timer B Registers Address Map (Continued)

(TMRB_BASE = $00 F040)