Datasheet

56F8037/56F8027 Signal Pins
56F8037/56F8027 Data Sheet, Rev. 8
Freescale Semiconductor 39
GPIOD5
(XTAL)
(CLKIN)
52 Input/
Output
Analog
Input/
Output
Input
Input Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
External Crystal Oscillator Output — This output connects the
internal crystal oscillator output to an external crystal.
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOD5.
GPIOD6
(DAC0)
18 Input/
Output
Analog
Input
Input,
internal
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
DAC0— Digital-to-Analog Converter output 0.
After reset, the default state is GPIOD6.
GPIOD7
(DAC1)
15 Input/
Output
Analog
Input
Input,
internal
pull-up
enabled
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
DAC1— Digital-to-Analog Converter output 1.
After reset, the default state is GPIOD7.
TDI
(GPIOD0)
59 Input
Input/
Output
Input,
internal
pull-up
enabled
Test Data Input — This input pin provides a serial input data stream
to the JTAG/EOnCE port. It is sampled on the rising edge of TCK
and has an on-chip pull-up resistor.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDI.
TDO
(GPIOD1)
64 Output
Input/
Output
Output
tri-stated,
internal
pull-up
enabled
Test Data Output — This tri-stateable output pin provides a serial
output data stream from the JTAG/EOnCE port. It is driven in the
shift-IR and shift-DR controller states, and changes on the falling
edge of TCK.
Port D GPIO — This GPIO pin can be individually programmed as
an input or output pin.
After reset, the default state is TDO.
Return to Table 2-2
Table 2-3 56F8037/56F8027 Signal and Package Information for the 64-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description