Datasheet

56F8037/56F8027 Data Sheet, Rev. 8
28 Freescale Semiconductor
GPIOA10
(TB2
6
)
(CMPAI2)
35 Input/
Output
Input/
Output
Input
Input,
internal
pull-up
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TB2 — Timer B, Channel 2.
Comparator A, Input 2 — This is an analog input to Comparator A.
After reset, the default state is GPIOA10. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
6
The TB2 signal is also brought out on the GPIOA13 pin.
GPIOA11
(TB3
7
)
(CMPBI2)
6 Input/
Output
Input/
Output
Input
Input,
internal
pull-up
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TB3 — Timer B, Channel 3.
Comparator B, Input 2 — This is an analog input to Comparator B.
After reset, the default state is GPIOA11. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
7
The TB3 signal is also brought out on the GPIOA14 pin.
GPIOA12
(SCLK1)
(TB1
8
)
(TA1
9
)
37 Input/
Output
Input/
Output
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port A GPIO — This GPIO pin can be individually programmed as
an input or output pin.
QSPI1 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as
the data clock input. A Schmitt trigger input is used for noise
immunity.
TB1 — Timer B, Channel 1.
TA1 — Timer A, Channel 1.
After reset, the default state is GPIOA12. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
8
The TB1 signal is also brought out on the GPIOB11 pin.
9
The TA1 signal is also brought out on the GPIOB5 pin.
Return to Table 2-2
Table 2-3 56F8037/56F8027 Signal and Package Information for the 64-Pin LQFP (Continued)
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description