Datasheet

Register Descriptions
56F8037/56F8027 Data Sheet, Rev. 8
Freescale Semiconductor 113
Note: After reset, all I/O pins are GPIO, except the JTAG pins and the RESET pin.
Figure 6-19 GPIO Peripheral Select Register 0 for GPIOA (SIM_GPSA0)
6.3.16.1 Reserved—Bits 15–13
This bit field is reserved. Each bit must be set to 0.
6.3.16.2 Configure GPIOA6 (GPS_A6)—Bit 12
This field selects the alternate function for GPIOA6.
• 0 = FAULT0 - PWM FAULT0 Input (default)
• 1 = TA0 - Timer A0
6.3.16.3 Configure GPIOA5 (GPS_A5)—Bits 11–10
This field selects the alternate function for GPIOA5.
• 00 = PWM5 - PWM5 (default)
• 01 = FAULT2 - PWM FAULT2 Input
• 10 = TA3 - Timer A3
•11 = Reserved
6.3.16.4 Configure GPIOA4 (GPS_A4)—Bits 9–8
This field selects the alternate function for GPIOA4.
• 00 = PWM4 - PWM4 (default)
• 01 = FAULT1 - PWM FAULT1 Input
• 10 = TA2 - Timer A2
•11 = Reserved
6.3.16.5 Reserved—Bits 7–0
This bit field is reserved. Each bit must be set to 0.
6.3.17 SIM GPIO Peripheral Select Register 1 for GPIOA (SIM_GPSA1)
See Section 6.3.16 for general information about GPIO Peripheral Select Registers.
Base + $13 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0 0
GPS_A6 GPS_A5 GPS_A4
0 0 0 0 0 0 0 0
Write
RESET
000 0 000000000000