Datasheet

56F8037/56F8027 Data Sheet, Rev. 8

112 Freescale Semiconductor

• 11 = Write protection on and locked until chip reset

6.3.15.3 GPIO and Internal Peripheral Select Protection (GIPSP)—Bits 1–0

These bits enable write protection of GPSn and IPSn registers in the SIM module and write protect all

GPIOx_PEREN, GPIOx_PPOUTM and GPIOx_DRIVE registers in GPIO modules.

• 00 = Write protection off (default)

• 01 = Write protection on

• 10 = Write protection off and locked until chip reset

• 11 = Write protection on and locked until chip reset

Note: The PWM fields in the CLKOUT register are also write protected by GIPSP. They are reserved for

in-house test only.

6.3.16 SIM GPIO Peripheral Select Register 0 for GPIOA (SIM_GPSA0)

Most I/O pins have an associated GPIO function. In addition to the GPIO function, I/O can be configured

to be one of several peripheral functions. The GPIOx_PEREN register within the GPIO module controls

the selection between peripheral or GPIO control of the I/O pins. The GPIO function is selected when the

GPIOx_PEREN bit for the I/O is 0. When the GPIOx_PEREN bit of the GPIO is 1, the fields in the GPSn

registers select which peripheral function has control of the I/O. Figure 6-18 illustrates the output path to

an I/O pin when an I/O has two peripheral functions. Similar muxing is required on peripheral function

inputs to receive input from the properly selected I/O pin.

Figure 6-18 Overall Control of Signal Source Using SIM_GPSnn Control

In some cases, the user can choose peripheral function between several I/O, each of which have the option

to be programmed to control a specific peripheral function. If the user wishes to use that function, only one

of these I/O must be configured to control that peripheral function. If more than one I/O is configured to

control the peripheral function, the peripheral output signal will fan out to each I/O, but the peripheral input

signal will be the logical OR and AND of all the I/O signals.

Complete lists of I/O muxings are provided in Table 2-3.

The GPSn setting can be altered during normal operation, but a delay must be inserted between the time

when one function is disabled and another function is enabled.

GPIOA6_PEREN

GPIOA6

GPIOA6 pin

SIM_GPSA0

PWM

FAULT0

Timer A0