Datasheet

Table Of Contents
Register Descriptions
56F8035/56F8025 Data Sheet, Rev. 6
Freescale Semiconductor 73
5.6.8 Vector Base Address Register (VBA)
Figure 5-10 Vector Base Address Register (VBA)
5.6.8.1 Reserved—Bits 15–14
This bit field is reserved. Each bit must be set to 0.
5.6.8.2 Vector Address Bus (VAB) Bits 13–0
The value in this register is used as the upper 14 bits of the interrupt vector VAB[20:0]. The lower 7 bits
are determined based on the highest priority interrupt and are then appended onto VBA before presenting
the full VAB to the Core.
5.6.9 Fast Interrupt Match 0 Register (FIM0)
Figure 5-11 Fast Interrupt Match 0 Register (FIM0)
5.6.9.1 Reserved—Bits 15–6
This bit field is reserved. Each bit must be set to 0.
5.6.9.2 Fast Interrupt 0 Vector Number (FAST INTERRUPT 0)—Bits 5–0
These values determine which IRQ will be Fast Interrupt 0. Fast Interrupts vector directly to a service
routine based on values in the Fast Interrupt Vector Address registers without having to go to a jump table
first. IRQs used as Fast Interrupts must be set to priority level 2. Unexpected results will occur if a Fast
Interrupt vector is set to any other priority. A Fast Interrupt automatically becomes the highest-priority
level 2 interrupt regardless of its location in the interrupt table prior to being declared as Fast Interrupt.
Fast Interrupt 0 has priority over Fast Interrupt 1. To determine the vector number of each IRQ, refer to
the vector table.
Base + $7
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0
VECTOR_BASE_ADDRESS
Write
RESET
1
1. The 56F8035 resets to a value of 0 x 0000. This corresponds to reset addresses of 0 x 000000.
The 56F8025 resets to a value of 0 x 0080. This corresponds to reset addresses of 0 x 004000.
0000000 010000000
Base + $8
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0 0 0 0 0 0 0 0 0
FAST INTERRUPT 0
Write
RESET
0000000000000000