Datasheet

Table Of Contents

Peripheral Memory-Mapped Registers

56F8035/56F8025 Data Sheet, Rev. 6

Freescale Semiconductor 55

I2C_RISTAT $1A Raw Interrupt Status Register

I2C_RXFT $1C Receive FIFO Threshold Register

I2C_TXFT $1E Transmit FIFO Threshold Register

I2C_CLRINT $20 Clear Combined and Individual Interrupts Register

I2C_CLRRXUND $22 Clear RX_UNDER Interrupt Register

I2C_CLRRXOVR $24 Clear RX_OVER Interrupt Register

I2C_CLRTXOVR $26 Clear TX_OVER Interrupt Register

I2C_CLRRDREQ $28 Clear RD_REQ Interrupt Register

I2C_CLRTXABRT $2A Clear TX_ABRT Interrupt Register

I2C_CLRRXDONE $2C Clear RX_DONE Interrupt Register

I2C_CLRACT $2E Clear Activity Interrupt Register

I2C_CLRSTPDET $30 Clear STOP_DET Interrupt Register

I2C_CLRSTDET $32 Clear START_DET Interrupt Register

I2C_CLRGC $34 Clear GEN_CALL Interrupt Register

I2C_ENBL $36 Enable Register

I2C_STAT $38 Status Register

I2C_TXFLR $3A Transmit FIFO Level Register

I2C_RXFLR $3C Receive FIFO Level Register

I2C_TXABRTSRC $40 Transmit Abort Status Register

Table 4-31 Flash Module Registers Address Map

(FM_BASE = $00 F400)

FM_CLKDIV $0 Clock Divider Register

FM_CNFG $1 Configuration Register

$2 Reserved

FM_SECHI $3 Security High Half Register

FM_SECLO $4 Security Low Half Register

$5 - $9 Reserved

FM_PROT $10 Protection Register

$11 - $12 Reserved

FM_USTAT $13 User Status Register

FM_CMD $14 Command Register

$15 - $17 Reserved

FM_DATA $18 Data Buffer Register

$19 - $A Reserved

Table 4-30 I

C Registers Address Map (Continued)

(I2C_BASE = $00 F280)