Datasheet

56F8035/56F8025 Data Sheet, Rev. 6
38 Freescale Semiconductor
FM 17 0-2 P:$22 FM Access Error Interrupt
FM 18 0-2 P:$24 FM Command Complete
FM 19 0-2 P:$26 FM Command, Data, and Address Buffers Empty
20-23 Reserved
GPIOD 24 0-2 P:$30 GPIOD
GPIOC 25 0-2 P:$32 GPIOC
GPIOB 26 0-2 P:$34 GPIOB
GPIOA 27 0-2 P:$36 GPIOA
QSPI0 28 0-2 P:$38 QSPI0 Receiver Full
QSPI0 29 0-2 P:$3A QSPI0 Transmitter Empty
30-31 Reserved
QSCI0 32 0-2 P:$40 QSCI0 Transmitter Empty
QSCI0 33 0-2 P:$42 QSCI0 Transmitter Idle
QSCI0 34 0-2 P:$44 QSCI0 Receiver Error
QSCI0 35 0-2 P:$46 QSCI0 Receiver Full
36-39 Reserved
I2C 40 0-2 P:$50
I
2
C Error
I2C 41 0-2 P:$52
I
2
C General
I2C 42 0-2 P:$54
I
2
C Receive
I2C 43 0-2 P:$56
I
2
C Transmit
I2C 44 0-2 P:$58
I
2
C Status
TMRA 45 0-2 P:$5A Timer A, Channel 0
TMRA 46 0-2 P:$5C Timer A, Channel 1
TMRA 47 0-2 P:$5E Timer A, Channel 2
TMRA 48 0-2 P:$60 Timer A, Channel 3
49-52 Reserved
CMPA 53 0-2 P:$6A Comparator A
CMPB 54 0-2 P:$6C Comparator B
PIT0 55 0-2 P:$6E Interval Timer 0
PIT1 56 0-2 P:$70 Interval Timer 1
PIT2 57 0-2 P:$72 Interval Timer 2
ADC 58 0-2 P:$74 ADC A Conversion Complete
ADC 59 0-2 P:$76 ADC B Conversion Complete
ADC 60 0-2 P:$78 ADC Zero Crossing or Limit Error
PWM 61 0-2 P:$7A Reload PWM
PWM 62 0-2 P:$7C PWM Fault
SWILP 63 -1 P:$7E SW Interrupt Low Priority
1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
from the vector table, providing only 19 bits of address.
2. If the VBA is set to the reset value, the first two locations of the vector table will overlay the chip reset addresses since
the reset address would match the base of this vector table.
Table 4-2 Interrupt Vector Table Contents
1
(Continued)
Peripheral
Vector
Number
Priority
Level
Vector Base
Address +
Interrupt Function