Datasheet

56F8035/56F8025 Data Sheet, Rev. 6
28 Freescale Semiconductor
GPIOB5
(TA1)
(FAULT3)
(CLKIN)
4 Input/
Output
Input/
Output
Input
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
TA1 — Timer A, Channel 1
FAULT3 — This fault input pin is used for disabling selected PWM
outputs in cases where fault conditions originate off-chip.
External Clock Input— This pin serves as an external clock input.
After reset, the default state is GPIOB5. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
GPIOB6
(RXD0)
(SDA
9
)
(CLKIN)
1 Input/
Output
Input
Input/
Output
Input
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Receive Data 0 — QSCI0 receive data input.
Serial Data — This pin serves as the I
2
C serial data line.
External Clock Input — This pin serves as an external clock input.
After reset, the default state is GPIOB6. The peripheral functionality
is controlled via the SIM (See Section 6.3.16) and the CLKMODE bit
of the OCCS Oscillator Control Register.
9
The SDA signal is also brought out on the GPIOB1 pin.
GPIOB7
(TXD0)
(SCL
10
)
3 Input/
Output
Input/
Output
Input/
Output
Input,
internal
pull-up
enabled
Port B GPIO — This GPIO pin can be individually programmed as
an input or output pin.
Transmit Data 0 — QSCI0 transmit data output or transmit/receive
in single wire operation.
Serial Clock — This pin serves as the I
2
C serial clock.
After reset, the default state is GPIOB7. The peripheral functionality
is controlled via the SIM. See Section 6.3.16.
10
The SCL signal is also brought out on the GPIOB0 pin.
Return to Table 2-2
Table 2-3 56F8035/56F8025 Signal and Package Information for the 44-Pin LQFP
Signal
Name
LQFP
Pin No.
Type
State During
Reset
Signal Description