Datasheet

Table Of Contents
56F8035/56F8025 Package and Pin-Out Information
56F8035/56F8025 Data Sheet, Rev. 6
Freescale Semiconductor 149
Cload is expressed in pF
Because of the low duty cycle on most device pins, power dissipation due to capacitive loads was found
to be fairly low when averaged over a period of time.
E, the external [static component], reflects the effects of placing resistive loads on the outputs of the
device. Sum the total of all V
2
/R or IV to arrive at the resistive load contribution to power. Assume V = 0.5
for the purposes of these rough calculations. For instance, if there is a total of eight PWM outputs driving
10mA into LEDs, then P = 8*.5*.01 = 40mW.
In previous discussions, power consumption due to parasitics associated with pure input pins is ignored,
as it is assumed to be negligible.
Part 11 Packaging
11.1 56F8035/56F8025 Package and Pin-Out Information
This section contains package and pin-out information for the 56F8035/56F8025. This device comes in a
44-pin Low-profile Quad Flat Pack (LQFP). Figure 11-1 shows the package outline, Figure 11-2 shows
the mechanical parameters and Table 11-1 lists the pin-out.