Datasheet

Table Of Contents
56F8035/56F8025 Data Sheet, Rev. 6
100 Freescale Semiconductor
6.3.18.5 Configure GPIOB3 (GPS_B3)—Bits 7–6
This field selects the alternate function for GPIOB3.
00 = MOSI0 - QSPI0 Master Out/Slave In (default)
01 = TA3 - Timer A3
10 = PSRC1 - PWM2/PWM3 Pair External Source
•11 = Reserved
6.3.18.6 Configure GPIOB2 (GPS_B2)—Bits 5–4
This field selects the alternate function for GPIOB2.
00 = MISO0 QSPI0 Master In/Slave Out (default)
01 = TA2 - Timer A2
10 = PSRC0 - PWM0/PWM1 Pair External Source
•11 = Reserved
6.3.18.7 Reserved—Bit 3
This bit field is reserved. It must be set to 0.
6.3.18.8 Configure GPIOB1 (GPS_B1)—Bit 2
This field selects the alternate function for GPIOB1.
•0 = SS0 - QSPI0 Slave Select (default)
1 = SDA - I2C Serial Data
6.3.18.9 Reserved—Bit 1
This bit field is reserved. It must be set to 0.
6.3.18.10 Configure GPIOB0 (GPS_B0)—Bits 0
This field selects the alternate function for GPIOB0.
0 = SCLK0 - QSPI0 Serial Clock (default)
1 = SCL - I
2
C Serial Clock
6.3.19 SIM GPIO Peripheral Select Register 1 for GPIOB (SIM_GPSB1)
See Section 6.3.16 for general information about GPIO Peripheral Select Registers.
Figure 6-22 GPIO Peripheral Select Register 1 for GPIOB (SIM_GPSB1)
Base + $16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0 0 0 0 0 0
GPS_
B11
0
GPS_
B10
0 0 0 0 0
GPS_
B7
Write
RESET
0000000000000000