Datasheet

56F8033/56F8023 Data Sheet, Rev. 6
68 Freescale Semiconductor
• 11 = IRQ is priority level 2
5.6.6 Interrupt Priority Register 5 (IPR5)
Figure 5-8 Interrupt Priority Register 5 (IPR6)
5.6.6.1 Reserved—Bits 15–14
This bit field is reserved. Each bit must be set to 0.
5.6.6.2 Programmable Interval Timer 0 Interrupt Priority Level (PIT0 IPL)—
Bits 13–12
This field is used to set the interrupt priority level for the Programmable Interval Timer 0 IRQ. This IRQ
is limited to priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.6.3 Comparator B Interrupt Priority Level (COMPB IPL)—
Bits 11–10
This field is used to set the interrupt priority level for the Comparator B IRQ. This IRQ is limited to
priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.6.4 Comparator A Interrupt Priority Level (COMPA IPL)—
Bits 9–8
This field is used to set the interrupt priority level for the Comparator IRQ. This IRQ is limited to priorities
0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
Base + $5
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
0 0
PIT0 IPL COMPB IPL COMPA IPL
0 0 0 0 0 0 0 0
Write
RESET
0000000000000000