Datasheet

56F8033/56F8023 Data Sheet, Rev. 6
64 Freescale Semiconductor
5.6.3.4 QSPI 0 Receiver Full Interrupt Priority Level (QSPI0_RCV IPL)—Bits 7–6
This field is used to set the interrupt priority level for the QSPI0 Receiver Full IRQ. This IRQ is limited
to priorities 0 through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.3.5 GPIOA Interrupt Priority Level (GPIOA IPL)—Bits 5–4
This field is used to set the interrupt priority level for the GPIOA IRQ. This IRQ is limited to priorities 0
through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.3.6 GPIOB Interrupt Priority Level (GPIOB IPL)—Bits 3–2
This field is used to set the interrupt priority level for the GPIOB IRQ. This IRQ is limited to priorities 0
through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.3.7 GPIOC Interrupt Priority Level (GPIOC IPL)—Bits 1–0
This field is used to set the interrupt priority level for the GPIOC IRQ. This IRQ is limited to priorities 0
through 2. It is disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
5.6.4 Interrupt Priority Register 3 (IPR3)
Figure 5-6 Interrupt Priority Register 3 (IPR3)
Base + $3
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Read
I2C_ERR IPL
0 0 0 0 0 0 0 0
QSCI0_RCV
IPL
QSCI0_RER
R IPL
QSCI0_TIDL
IPL
Write
RESET
0 000000000000000