Datasheet
Peripheral Memory-Mapped Registers
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor 49
GPIOC_DATA $1 Data Register
GPIOC_DDIR $2 Data Direction Register
GPIOC_PEREN $3 Peripheral Enable Register
GPIOC_IASSRT $4 Interrupt Assert Register
GPIOC_IEN $5 Interrupt Enable Register
GPIOC_IEPOL $6 Interrupt Edge Polarity Register
GPIOC_IPEND $7 Interrupt Pending Register
GPIOC_IEDGE $8 Interrupt Edge-Sensitive Register
GPIOC_PPOUTM $9 Push-Pull Output Mode Control Register
GPIOC_RDATA $A Raw Data Input Register
GPIOC_DRIVE $B Output Drive Strength Control Register
Table 4-19 GPIOC Registers Address Map
(GPIOC_BASE = $00 F170)
Register Acronym Address Offset Register Description