Datasheet

56F8033/56F8023 Data Sheet, Rev. 6
44 Freescale Semiconductor
ADC_RSLT14 $1A Result Register 14
ADC_RSLT15 $1B Result Register 15
ADC_LOLIM0 $1C Low Limit Register 0
ADC_LOLIM1 $1D Low Limit Register 1
ADC_LOLIM2 $1E Low Limit Register 2
ADC_LOLIM3 $1F Low Limit Register 3
ADC_LOLIM4 $20 Low Limit Register 4
ADC_LOLIM5 $21 Low Limit Register 5
ADC_LOLIM6 $22 Low Limit Register 6
ADC_LOLIM7 $23 Low Limit Register 7
ADC_HILIM0 $24 High Limit Register 0
ADC_HILIM1 $25 High Limit Register 1
ADC_HILIM2 $26 High Limit Register 2
ADC_HILIM3 $27 High Limit Register 3
ADC_HILIM4 $28 High Limit Register 4
ADC_HILIM5 $29 High Limit Register 5
ADC_HILIM6 $2A High Limit Register 6
ADC_HILIM7 $2B High Limit Register 7
ADC_OFFST0 $2C Offset Register 0
ADC_OFFST1 $2D Offset Register 1
ADC_OFFST2 $2E Offset Register 2
ADC_OFFST3 $2F Offset Register 3
ADC_OFFST4 $30 Offset Register 4
ADC_OFFST5 $31 Offset Register 5
ADC_OFFST6 $32 Offset Register 6
ADC_OFFST7 $33 Offset Register 7
ADC_PWR $34 Power Control Register
ADC_CAL $35 Calibration Register
Reserved
Table 4-11 Pulse Width Modulator Registers Address Map
(PWM_BASE = $00 F0C0)
Register Acronym Address Offset Register Description
PWM_CTRL $0 Control Register
PWM_FCTRL $1 Fault Control Register
PWM_FLTACK $2 Fault Status Acknowledge Register
Table 4-10 Analog-to-Digital Converter Registers Address Map (Continued)
(ADC_BASE = $00 F080)
Register Acronym Address Offset Register Description