Datasheet

Interrupt Vector Table
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor 35
4.2 Interrupt Vector Table
Table 4-2 provides the 56F8033/56F8023’s reset and interrupt priority structure, including on-chip
peripherals. The table is organized with higher-priority vectors at the top and lower-priority interrupts
lower in the table. As indicated, the priority of an interrupt can be assigned to different levels, allowing
some control over interrupt priorities. All level 3 interrupts will be serviced before level 2, and so on. For
a selected priority level, the lowest vector number has the highest priority.
The location of the vector table is determined by the Vector Base Address (VBA). Please see Section 5.6.8
for the reset value of the VBA.
By default, the chip reset address and COP reset address will correspond to vector 0 and 1 of the interrupt
vector table. In these instances, the first two locations in the vector table must contain branch or JMP
instructions. All other entries must contain JSR instructions.
Table 4-1 Chip Memory Configurations
On-Chip Memory 56F8033 56F8023 Use Restrictions
Program Flash (PFLASH)
32K x 16
or 64KB
16K x 16
or 32KB
Erase/Program via Flash interface unit and
word writes to CDBW
Unified RAM (RAM)
4K x 16
or 8KB
2K x 16
or 4KB
Usable by both the Program and Data
memory spaces
Table 4-2 Interrupt Vector Table Contents
1
Peripheral
Vector
Number
Priority
Level
Vector Base
Address +
Interrupt Function
core
P:$00
Reserved for Reset Overlay
2
core
P:$02 Reserved for COP Reset Overlay
core 2 3 P:$04 Illegal Instruction
core 3 3 P:$06 SW Interrupt 3
core 4 3 P:$08 HW Stack Overflow
core 5 3 P:$0A Misaligned Long Word Access
core 6 1-3 P:$0C EOnCE Step Counter
core 7 1-3 P:$0E EOnCE Breakpoint Unit
core 8 1-3 P:$10 EOnCE Trace Buffer
core 9 1-3 P:$12 EOnCE Transmit Register Empty
core 10 1-3 P:$14 EOnCE Receive Register Full
core 11 2 P:$16 SW Interrupt 2
core 12 1 P:$18 SW Interrupt 1
core 13 0 P:$1A SW Interrupt 0
14 Reserved
LVI 15 1-3 P:$1E Low-Voltage Detector (Power Sense)
PLL 16 1-3 P:$20 Phase-Locked Loop