Datasheet

56F8033/56F8023 Data Sheet, Rev. 6
154 Freescale Semiconductor
Security Low Half
Register
SECLO FMSECL FM_SECLO FMSECL FMSECL 0xF404
Protection Register PROT FMPROT FM_PROT FMPROT FMPROT 0xF410
User Status Register USTAT FMUSTAT FM_USTAT FMUSTAT FMUSTAT 0xF413
Comm a nd Reg ister CMD FMCMD FM_CMD FMCMD FMCMD 0x F414
Data Buffer Register DATA FMDATA FM_DATA FMDATA FMDATA 0xF418
Info Optional Data 1
Register
OPT1 FMOPT1 FM_OPT1 FMOPT1 FMOPT1 0 x F41B
Test Array Signature
Register
TSTSIG FMTST_SIG FM_TSTSIG FMTST_SIG FMTST_SIG 0xF41D
General Purpose Input/Output (GPIO) Module
x = A (n=0) B (n=1) C (n=2) D (n=3)
Pull-Up Enable
Register
PUPEN PUR GPIOx_PUPEN GPIOx_PUR GPIO_x_PUR 0x F1n0
Data Register DATA DR GPIOx_DATA GPIOx_DR GPIO_x_DR 0xF1n1
Data Direction
Register
DDIR DDR GPIOx_DDIR GPIOx_DDR GPIO_x_DDR 0 xF1n2
Peripheral Enable
Register
PEREN PER GPIOx_PEREN GPIOx_PER GPIO_x_PER 0xF1n3
Interrupt Assert
Register
IASSRT IAR GPIOx_IASSRT GPIOx_IAR GPIO_x_IAR 0xF 1n4
Interrupt Enable
Register
IEN IENR GPIOx_IEN GPIOx_IENR GPIO_x_IENR 0xF1n5
Interrupt Polarity
Register
IPOL IPOLR GPIOx_IPOL GPIOx_IPOLR GPIO_x_IPOLR 0 xF 1 n6
Interrupt Pending
Register
IPEND IPR GPIOx_IPEND GPIOx_IPR GPIO_x_IPR 0xF1n7
Interrupt
Edge-Sensitive
Register
IEDGE IESR GPIOx_IEDGE GPIOx_IESR GPIO_x_IESR 0 xF1n8
Push-Pull Mode
Registers
PPOUTM PPMODE GPIOx_PPOUTM GPIOx_PPMODE GPIO_x_PPMODE 0xF1n9
Raw Data Input
Register
RDATA RAWDATA GPIOx_RDATA GPIOx_RAWDATA GPIO_x_RAWDATA 0 xF1 nA
Output Drive Strength
Register
DRIVE DRIVE GPIOx_DRIVE GPIOx_DRIVE GPIO_x_DRIVE 0xF1nB
Table 14-1 Legacy and Revised Acronyms (Continued)
Register Name
Peripheral Reference
Manual
Data Sheet
Processor Expert
Acronym
Memory
Address
New
Acronym
Legacy
Acronym
New
Acronym
Legacy
Acronym
Start End