Datasheet

Analog-to-Digital Converter (ADC) Parameters
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor 137
10.14 Analog-to-Digital Converter (ADC) Parameters
Table 10-19 ADC Parameters
1
1. All measurements were made at V
DD
= 3.3V, V
REFH
= 3.3V, and V
REFL
= ground
Parameter Symbol Min Typ Max Unit
DC Specifications
Resolution
R
ES
12 — 12 Bits
ADC internal clock
f
ADIC
0.1 — 5.33 MHz
Conversion range
R
AD
V
REFL
—V
REFH
V
ADC power-up time
2
2. Includes power-up of ADC and V
REF
t
ADPU
—6 13
t
AIC
cycles
3
3. ADC clock cycles
Recovery from auto standby
t
REC
—0 1
t
AIC
cycles
3
Conversion time
t
ADC
—6 —
t
AIC
cycles
3
Sample time
t
ADS
—1 —
t
AIC
cycles
3
Accuracy
Integral non-linearity
4
(Full input signal range)
4. INL measured from V
IN
= V
REFL
to V
IN
= V
REFH
INL — +/- 3 +/- 5
LSB
5
5. LSB = Least Significant Bit = 0.806mV
Differential non-linearity
DNL — +/- .6 +/- 1
LSB
5
Monotonicity
GUARANTEED
Offset Voltage Internal Ref
V
OFFSET
— +/- 4 +/- 9 mV
Offset Voltage External Ref
V
OFFSET
— +/- 6 +/- 12 mV
Gain Error (transfer gain)
E
GAIN
— .998 to 1.002 1.01 to .99 —
ADC Inputs
6
(Pin Group 3)
6. Pin groups are detailed following Table 10-1.
Input voltage (external reference)
V
ADIN
V
REFL
—V
REFH
V
Input voltage (internal reference)
V
ADIN
V
SSA
—V
DDA
V
Input leakage
I
IA
—0 +/- 2μA
V
REFH
current
I
VREFH
—0 —μA
Input injection current
7
, per pin
I
ADI
—— 3mA
Input capacitance
C
ADI
— See Figure 10-17 —pF
Input impedance
X
IN
— See Figure 10-17 —Ohms
AC Specifications
Signal-to-noise ratio
SNR 60 65 dB
Total Harmonic Distortion
THD 60 64 dB
Spurious Free Dynamic Range
SFDR 61 66 dB
Signal-to-noise plus distortion
SINAD 58 62 dB
Effective Number Of Bits
ENOB — 10.0 Bits