Datasheet

Architecture Block Diagram
56F8033/56F8023 Data Sheet, Rev. 6
Freescale Semiconductor 11
Figure 1-2 Peripheral Subsystem
IPBus
GPIO A
Interrupt
Controller
To/From IPBus Bridge
GPIO B
GPIO C
OCCS
(ROSC / PLL /
OSC)
POR & LVI
SIM
GPIO D
Low-Voltage Interrupt
System POR
COP Reset
RESE
T
(Muxed with GPIOA7)
COP
(Continues on Figure 1-3)