Datasheet

LPC82x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 1 October 2014 5 of 81
NXP Semiconductors
LPC82x
32-bit ARM Cortex-M0+ microcontroller
6. Block diagram
Gray-shaded blocks show peripherals that can provide hardware triggers or fixed DMA requests for DMA transfers.
Fig 3. LPC82x block diagram
SRAM
4/8 KB
ARM
CORTEX-M0+
TEST/DEBUG
INTERFACE
FLASH
16/32 KB
HIGH-SPEED
GPIO
AHB TO APB
BRIDGE
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
RESET, CLKIN
clocks and
controls
LPC82xM
aaa-014399
slave
slave slave
ROM
slave
CRC
slave master
PIN INTERRUPTS/
PATTERN MATCH
AHB-LITE BUS
IRC
WDOsc
BOD
POR
SPI0/1
USART0/1/2
SDA
SCL
SCT_PIN[3:0]
29 x
PIO0
29 x
WWDT
IOCON
PMU
SELF
WAKE-UP TIMER
MULTI-RATE TIMER
I
2
C0/1/2/3
SCTIMER/
PWM
SWITCH
MATRIX
SCT_OUT[6:0]
COMPARATOR
XTALIN
XTALOUT
ACMP_O
SYSCON
RXD, CTS
TXD, RTS
ACMP_I[4:1]
VDDCMP
ADC
ADC_[11:0]
SCK, SSEL
MISO, MOSI
ALWAYS-ON POWER DOMAIN
XTAL
SCLK
CLKOUT
SWCLK, SWD
INPUT MUX
DMA