Datasheet

LPC82x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1 — 1 October 2014 25 of 81
NXP Semiconductors
LPC82x
32-bit ARM Cortex-M0+ microcontroller
Each oscillator, except the low-frequency oscillator, can be used for more than one
purpose as required in a particular application.
Following reset, the LPC82x operates from the IRC until switched by software allowing the
part to run without any external crystal and the bootloader code to operate at a known
frequency.
See Figure 9
for an overview of the LPC82x clock generation.
8.22.1.1 Internal RC Oscillator (IRC)
The IRC may be used as the clock source for the WWDT, and/or as the clock that drives
the PLL and then the CPU. The nominal IRC frequency is 12 MHz. The IRC is trimmed to
1.5 % accuracy over the entire voltage and temperature range.
The IRC can be used as a clock source for the CPU with or without using the PLL. The
IRC frequency can be boosted to a higher frequency, up to the maximum CPU operating
frequency, by the system PLL.
Upon power-up or any chip reset, the LPC82x use the IRC as the clock source. Software
may later switch to one of the other available clock sources.
8.22.1.2 Crystal Oscillator (SysOsc)
The crystal oscillator can be used as the clock source for the CPU, with or without using
the PLL.
The SysOsc operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted
to a higher frequency, up to the maximum CPU operating frequency, by the system PLL.
8.22.1.3 Internal Low-power Oscillator and Watchdog Oscillator (WDOsc)
The nominal frequency of the WDOsc is programmable between 9.4 kHz and 2.3 MHz.
The frequency spread over silicon process variations is  40%.
The WDOsc is a dedicated oscillator for the windowed WWDT.
The internal low-power 10 kHz ( 40% accuracy) oscillator serves as the clock input to the
WKT. This oscillator can be configured to run in all low-power modes.
8.22.2 Clock input
An external clock source can be supplied on the selected CLKIN pin directly to the PLL
input. When selecting a clock signal for the CLKIN pin, follow the specifications for digital
I/O pins in Table 8 “
Static characteristics, supply pins” and Table 15 “Dynamic
characteristics: I/O pins
[1]
”.
An 1.8 V external clock source can be supplied on the XTALIN pins to the system
oscillator limiting the voltage of this signal (see Section 14.1
).
The maximum frequency for both clock signals is 25 MHz.
8.22.3 System PLL
The PLL accepts an input clock frequency in the range of 10 MHz to 25 MHz. The input
frequency is multiplied up to a high frequency with a Current Controlled Oscillator (CCO).
The multiplier can be an integer value from 1 to 32. The CCO operates in the range of
156 MHz to 320 MHz, so there is an additional divider in the loop to keep the CCO within