Datasheet

LPC408X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.1 — 1 September 2014 99 of 138
NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
11.7 I
2
C-bus
Fig 25. SSP slave timing in SPI mode
SCK (CPOL = 0)
MOSI
MISO
T
cy(clk)
t
DS
t
DH
t
v(Q)
DATA VALID DATA VALID
t
h(Q)
SCK (CPOL = 1)
DATA VALID
DATA VALID
MOSI
MISO
t
DS
t
DH
t
v(Q)
DATA VALID DATA VALID
t
h(Q)
DATA VALID
DATA VALID
CPHA = 1
CPHA = 0
002aae830
Table 23. Dynamic characteristic: I
2
C-bus pins
[1]
T
amb
=  40  C to +85  C.
[2]
Symbol Parameter Conditions Min Max Unit
f
SCL
SCL clock
frequency
Standard-mode 0 100 kHz
Fast-mode 0 400 kHz
Fast-mode Plus 0 1 MHz
t
f
fall time
[4][5][6][7]
of both SDA and
SCL signals
Standard-mode
- 300 ns
Fast-mode 20 + 0.1  C
b
300 ns
Fast-mode Plus - 120 ns
t
LOW
LOW period of
the SCL clock
Standard-mode 4.7 - s
Fast-mode 1.3 - s
Fast-mode Plus 0.5 - s
t
HIGH
HIGH period of
the SCL clock
Standard-mode 4.0 - s
Fast-mode 0.6 - s
Fast-mode Plus 0.26 - s