Datasheet

LPC408X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.1 — 1 September 2014 92 of 138
NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
[2] Parameters specified for 40 % of V
DD(3V3)
for rising edges and 60 % of V
DD(3V3)
for falling edges.
[3] T
cy(clk)
= 1/EMC_CLK (see LPC408x/7x User manual).
[4] Latest of address valid, EMC_CSx
LOW, EMC_OE LOW, EMC_BLSx LOW (PB = 1).
[5] After End Of Read (EOR): Earliest of EMC_CSx
HIGH, EMC_OE HIGH, EMC_BLSx HIGH (PB = 1), address invalid.
[6] End Of Write (EOW): Earliest of address invalid, EMC_CSx
HIGH, EMC_BLSx HIGH (PB = 1).
Fig 19. External static memory read/write access (PB = 0)
RD
1
RD
5
RD
2
WR
2
WR
9
WR
12
WR
10
WR
11
RD
5
RD
5
RD
6
WR
8
WR
1
EOR
EOW
RD
7
RD
4
EMC_Ax
EMC_CSx
EMC_OE
EMC_BLSx
EMC_WE
EMC_Dx
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Fig 20. External static memory read/write access (PB =1)
RD
1
WR
1
EMC_Ax
WR
8
WR
4
WR
8
EMC_CSx
RD
2
RD
7
RD
7
RD
4
EMC_OE
EMC_BLSx
EMC_WE
RD
5
WR
6
WR
2
RD
5
RD
5
RD
5
RD
6
RD
3
EOR
EOW
EMC_Dx
WR
3
WR
5
WR
7
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