Datasheet

LPC408X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.1 — 1 September 2014 53 of 138
NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
The LPC408x/7x incorporate several distinct memory regions, shown in the following
figures. Figure 9
shows the overall map of the entire address space from the user
program viewpoint following reset. The interrupt vector area supports address remapping.
The AHB peripheral area is 2 MB in size, and is divided to allow for up to 128 peripherals.
The APB peripheral area is 1 MB in size and is divided to allow for up to 64 peripherals.
Each peripheral of either type is allocated 16 kB of space. This allows simplifying the
address decoding for each peripheral.
7.9 Nested Vectored Interrupt Controller (NVIC)
The NVIC is an integral part of the Cortex-M4. The tight coupling to the CPU allows for low
interrupt latency and efficient processing of late arriving interrupts.
7.9.1 Features
• Controls system exceptions and peripheral interrupts.
• On the LPC408x/7x, the NVIC supports 40 vectored interrupts.
• 32 programmable interrupt priority levels, with hardware priority level masking.
• Relocatable vector table.
• Non-Maskable Interrupt (NMI).
• Software interrupt generation.
7.9.2 Interrupt sources
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
Any pin on port 0 and port 2 regardless of the selected function can be programmed to
generate an interrupt on a rising edge, a falling edge, or both.
0x8000 0000 to
0xDFFF FFFF
Off-chip Memory via
the External Memory
Controller
Four static memory chip selects:
0x8000 0000 to 0x83FF FFFF Static memory chip select 0 (up to 64 MB)
0x9000 0000 to 0x93FF FFFF Static memory chip select 1 (up to 64 MB)
0x9800 0000 to 0x9BFF FFFF Static memory chip select 2 (up to 64 MB)
0x9C00 0000 to 0x9FFF FFFF Static memory chip select 3 (up to 64 MB)
Four dynamic memory chip selects:
0xA000 0000 to 0xAFFF FFFF Dynamic memory chip select 0 (up to 256 MB)
0xB000 0000 to 0xBFFF FFFF Dynamic memory chip select 1 (up to 256 MB)
0xC000 0000 to 0xCFFF FFFF Dynamic memory chip select 2 (up to 256 MB)
0xD000 0000 to 0xDFFF FFFF Dynamic memory chip select 3 (up to 256 MB)
0xE000 0000 to
0xE00F FFFF
Cortex-M4 Private
Peripheral Bus
0xE000 0000 to 0xE00F FFFF Cortex-M4 related functions, includes the NVIC
and System Tick Timer.
Table 4. LPC408x/7x memory usage and details
Address range General Use Address range details and description