Datasheet

LPC408X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.1 — 1 September 2014 134 of 138
NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
• Added LQFP100 and TFBGA80.
• Table 3:
– Removed overbar from NMI.
– Added minimum reset pulse width of 50 ns to RESET
pin.
– Updated Table note 14 for RTCX pins (32 kHz crystal must be used to operate RTC).
– Added boundary scan information to description for RESET
pin.
• Table 11:
– Updated typ numbers for I
DD(REG)(3V3)
and I
BAT
.
– Added max values for deep sleep, power down, and deep PD for I
BAT
.
• Table 15, Table note 3: Changed T
cy(clk)
= 1/CCLK to T
cy(clk)
= 1/EMC_CLK.
• Table 21: Removed reference to RESET pin from Table note 1.
• Table 22:
– Removed T
cy(PCLK)
spec; already given by the maximum chip frequency.
– Changed min clock cycle time for SSP slave from 120 to 100.
– Updated Table note 1 and Table note 3.
• Section 7.24.1 “Features”: Changed max speed for SSP master from 60 to 33.
• Updated EMC timing specs to C
L
= 30 pF in Table 15, Table 16, Table 17, and Table 18.
• SOT570-2 obsolete; replaced with SOT570-3.
LPC408X_7X v.1.1 20121114 Product data sheet - LPC408X_7X v.1
Modifications:
• Changed data sheet status to Product.
LPC408X_7X v.1 20120917 Objective data sheet - -
Table 37. Revision history
…continued
Document ID Release date Data sheet status Change notice Supersedes