Datasheet

LPC408X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 3.1 — 1 September 2014 102 of 138
NXP Semiconductors
LPC408x/7x
32-bit ARM Cortex-M4 microcontroller
11.9 LCD
Remark: The LCD controller is available on parts LPC4088.
11.10 SD/MMC
Remark: The SD/MMC card interface is available on parts LPC4088/78/76.
Fig 28. I
2
S-bus timing (receive)
002aag203
T
cy(clk)
t
f
t
r
t
WH
t
su(D)
t
h(D)
t
su(D)
t
su(D)
t
WL
I2S_RX_SCK
I2S_RX_SDA
I2S_RX_WS
Table 25. Dynamic characteristics: LCD
C
L
=10pF, T
amb
=  40  C to 85  C, V
DD(3V3)
= 3.0 V to 3.6 V. Values guaranteed by design.
Symbol Parameter Conditions Min Max Unit
f
clk
clock frequency on pin LCD_DCLK - 50 MHz
t
d(QV)
data output valid delay time - 12 ns
t
h(Q)
data output hold time 0.5 - ns
The LCD panel clock is shown with the default polarity. The clock can be inverted via the IPC bit in
the LCD_POL register. Typically, the LCD panel uses the falling edge of the LCD_DCLK to sample
the data.
Fig 29. LCD timing
002aah325
LCD_DCLK
t
d(QV)
T
cy(clk)
t
h(Q)
LCD_VD[n]