LPC2114/2124 Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC Rev. 7 — 10 June 2011 Product data sheet 1. General description The LPC2114/2124 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128/256 kB of embedded high-speed flash memory. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at maximum clock rate.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 128/256 kB on-chip flash program memory. 128-bit wide interface/accelerator enables high speed 60 MHz operation. In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software. Flash programming takes 1 ms per 512 B line. Single sector or full chip erase takes 400 ms. EmbeddedICE-RT interface enables breakpoints and watch points.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 3.1 Ordering options Table 2. LPC2114_2124 Product data sheet Ordering options Type number Flash memory RAM Fast GPIO/SSP/ Enhanced UART, ADC, Timer Temperature range LPC2114FBD64/01 128 kB 16 kB yes 40 C to +85 C LPC2124FBD64/01 256 kB 16 kB yes 40 C to +85 C All information provided in this document is subject to legal disclaimers. Rev. 7 — 10 June 2011 © NXP B.V. 2011. All rights reserved.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 4.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 5. Pinning information 49 VDD(1V8) 50 VSS 51 VDD(3V3) 52 P1[30]/TMS 53 P0[18]/CAP1[3]/MISO1/MAT1[3] 54 P0[19]/MAT1[2]/MOSI1/CAP1[2] 55 P0[20]/MAT1[3]/SSEL1/EINT3 56 P1[29]/TCK 57 RESET 58 VSSA(PLL) 59 VSSA 60 P1[28]/TDI 61 XTAL2 62 XTAL1 63 VDDA(1V8) 64 P1[27]/TDO 5.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 5.2 Pin description Table 3. Pin description Symbol Pin P0[0] to P0[31] P0[0]/TXD0/ PWM1 19 P0[1]/RXD0/ PWM3/EINT0 21 P0[2]/SCL/ CAP0[0] 22 P0[3]/SDA/ MAT0[0]/EINT1 26 Type Description I/O Port 0 is a 32-bit bidirectional I/O port with individual direction controls for each bit. The operation of port 0 pins depends upon the pin function selected via the Pin Connect Block. Pins 26 and 31 of port 0 are not available.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 3. Pin description …continued Symbol Pin Type Description P0[15]/RI1/EINT2 45 I RI1 — Ring Indicator input for UART1. I EINT2 — External interrupt 2 input. I EINT0 — External interrupt 0 input. O MAT0[2] — Match output for Timer 0, channel 2. I CAP0[2] — Capture input for Timer 0, channel 2. I CAP1[2] — Capture input for Timer 1, channel 2. I/O SCK1 — Serial Clock for SPI1/SSP[1].
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 3. Pin description …continued Symbol Pin Type Description P1[16]/ TRACEPKT0 16 O Trace Packet, bit 0. Standard I/O port with internal pull-up. P1[17]/ TRACEPKT1 12 O Trace Packet, bit 1. Standard I/O port with internal pull-up. P1[18]/ TRACEPKT2 8 O Trace Packet, bit 2. Standard I/O port with internal pull-up. P1[19]/ TRACEPKT3 4 O Trace Packet, bit 3. Standard I/O port with internal pull-up.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 3. Pin description …continued Symbol Pin Type Description VDDA(1V8) 63 I analog 1.8 V core power supply; this is the power supply voltage for internal circuitry. This should be nominally the same voltage as VDD(1V8) but should be isolated to minimize noise and error. VDD(3V3) 23, 43, 51 I 3.3 V pad power supply; this is the power supply voltage for the I/O ports VDDA(3V3) 7 I analog 3.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6. Functional description Details of the LPC2114/2124 systems and peripheral functions are described in the following sections. 6.1 Architectural overview The ARM7TDMI-S is a general purpose 32-bit microprocessor, which offers high performance and very low power consumption.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers However, the ISP flash erase command can be executed at any time (no matter whether the CRP is on or off). Removal of CRP is achieved by erasure of full on-chip user flash. With the CRP off, full access to the chip via the JTAG and/or ISP is restored. 6.3 On-chip static RAM On-chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8 bit, 16 bit, and 32 bit. The LPC2114/2124 provide 16 kB of static RAM.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 4.0 GB 0xFFFF FFFF AHB PERIPHERALS 3.75 GB APB PERIPHERALS 0xF000 0000 0xEFFF FFFF 3.5 GB 0xE000 0000 0xDFFF FFFF 3.0 GB 0xC000 0000 RESERVED ADDRESS SPACE 2.0 GB BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY) 0x8000 0000 0x7FFF FFFF 0x7FFF E000 0x7FFF DFFF RESERVED ADDRESS SPACE 0x4000 4000 0x4000 3FFF 16 kB ON-CHIP STATIC RAM 0x4000 0000 0x3FFF FFFF 1.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned to this category. Any of the interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest. Non-vectored IRQs have the lowest priority. The VIC combines the requests from all the vectored and non-vectored IRQs to produce the IRQ signal to the ARM processor.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 4. Interrupt sources …continued Block Flag(s) VIC channel # System Control External Interrupt 0 (EINT0) 14 External Interrupt 1 (EINT1) 15 External Interrupt 2 (EINT2) 16 External Interrupt 3 (EINT3) 17 ADC 18 ADC [1] SSP interface available on LPC2114/01 and LPC2124/01 only. 6.6 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6.8.1 Features • • • • • • Measurement range of 0 V to 3 V. Capable of performing more than 400000 10-bit samples per second. Burst conversion mode for single or multiple inputs. Optional conversion on transition on input pin or Timer Match signal. Every analog input has a dedicated result register to reduce interrupt overhead. Every analog input can generate an interrupt once the conversion is completed. 6.8.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers the capability to both receive and send information (such as memory). Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus; it can be controlled by more than one bus master connected to it. The I2C-bus implemented in LPC2114/2124 supports a bit rate up to 400 kbit/s (Fast I2C-bus). 6.10.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6.12 SSP controller (LPC2114/2124/01 only) Remark: This peripheral is available in LPC2114/2124/01 only. The SSP is a controller capable of operation on a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the bus. Only a single master and a single slave can communicate on the bus during a given data transfer.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6.13.2 Features available in LPC2114/2124/01 only • Timer can count cycles of either the peripheral clock (PCLK) or an externally supplied clock. • When counting cycles of an externally supplied clock only one of timer’s capture inputs can be selected as the timer’s clock. The rate of such a clock is limited to PCLK / 4. Duration of HIGH/LOW levels on the selected CAPn input can not be shorter than 1 / (2PCLK). 6.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6.16 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2114/2124. The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers. The PWM function is also based on match register events.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers • Match register updates are synchronized with pulse outputs to prevent generation of erroneous pulses. Software must ‘release’ new match values before they can become effective. • May be used as a standard timer if the PWM mode is not enabled. • A 32-bit Timer/Counter with a programmable 32-bit Prescaler. 6.17 System control 6.17.1 Crystal oscillator The oscillator supports crystals in the range of 1 MHz to 30 MHz.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers The Wake-up Timer monitors the crystal oscillator as the means of checking whether it is safe to begin code execution. When power is applied to the chip, or some event caused the chip to exit Power-down mode, some time is required for the oscillator to produce a signal of sufficient amplitude to drive the clock logic.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 6.17.7 Power control The LPC2114/2124 support two reduced power modes: Idle mode and Power-down mode. In Idle mode, execution of instructions is suspended until either a Reset or interrupt occurs. Peripheral functions continue operation during Idle mode and may generate interrupts to cause the processor to resume execution.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers communication channel allows the JTAG port to be used for sending and receiving data without affecting the normal program flow. The debug communication channel data and control registers are mapped in to addresses in the EmbeddedICE logic. The JTAG clock (TCK) must be slower than 1⁄6 of the CPU clock (CCLK) for the JTAG interface to operate. 6.18.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol Min Max Unit supply voltage (1.8 V) [2] 0.5 +2.5 V VDD(3V3) supply voltage (3.3 V) [3] 0.5 +3.6 V VDDA(3V3) analog supply voltage (3.3 V) 0.5 +4.6 V VIA analog input voltage VDD(1V8) Parameter Conditions 0.5 +5.1 V 5 V tolerant I/O pins [4][5] 0.5 +6.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 8. Static characteristics Table 6. Static characteristics Tamb = 40 C to +85 C for industrial applications, unless otherwise specified. Symbol VDD(1V8) VDD(3V3) Min Typ[1] Max Unit supply voltage (1.8 V) [2] 1.65 1.8 1.95 V supply voltage (3.3 V) [3] 3.0 3.3 3.6 V 2.5 3.3 3.6 V Parameter Conditions VDDA(3V3) analog supply voltage (3.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 6. Static characteristics …continued Tamb = 40 C to +85 C for industrial applications, unless otherwise specified. Symbol Parameter Min Typ[1] Max Unit - 60 - mA VDD(1V8) = 1.8 V; Tamb = 25 C - 10 - A VDD(1V8) = 1.8 V; Tamb = 85 C - 110 500 A - 40 - mA - 6.5 - mA VDD(1V8) = 1.8 V; Tamb = 25 C - 10 - A VDD(1V8) = 1.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 6. Static characteristics …continued Tamb = 40 C to +85 C for industrial applications, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit 0 - 1.8 V 0 - 1.8 V Oscillator pins Vi(XTAL1) input voltage on pin XTAL1 Vo(XTAL2) output voltage on pin XTAL2 [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [2] Internal rail.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Table 7. ADC static characteristics VDDA = 2.5 V to 3.6 V unless otherwise specified; Tamb = 40 C to +85 C unless otherwise specified. ADC frequency 4.5 MHz.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers gain error EG offset error EO 1023 1022 1021 1020 1019 1018 (2) 7 code out (1) 6 5 (5) 4 (4) 3 (3) 2 1 LSB (ideal) 1 0 1 2 3 4 5 6 7 1018 1019 1020 1021 1022 1023 1024 VIA (LSBideal) 1 LSB = offset error EO VDDA − VSSA 1024 002aaa668 (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (ED). (4) Integral non-linearity (EL(adj)).
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 8.1 Power consumption measurements for LPC2114/01 and LPC2124/01 The power consumption measurements represent typical values for the given conditions. The peripherals were enabled through the PCONP register, but for these measurements, the peripherals were not configured to run. Peripherals were disabled through the PCONP register. For a description of the PCONP register refer to the LPC2114/2124/2212/2214 User Manual.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 002aad151 50 IDD(act) (mA) 60 MHz 40 48 MHz 30 20 12 MHz 10 0 1.65 1.80 voltage (V) 1.95 Test conditions: Active mode entered executing code from on-chip flash; PCLK = CCLK⁄4; Tamb = 25 C; core voltage 1.8 V; all peripherals enabled. Fig 7.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 002aad154 10 IDD(idle) (mA) 8 60 MHz 6 48 MHz 4 12 MHz 2 0 1.65 1.80 voltage (V) 1.95 Test conditions: Idle mode entered executing code from on-chip flash; PCLK = CCLK⁄4; Tamb = 25 C; core voltage 1.8 V; all peripherals enabled. Fig 9. Typical LPC2114/01 and LPC2124/01 IDD(idle) measured at different voltages 002aad153 10 IDD(idle) (mA) 8 60 MHz 48 MHz 6 4 12 MHz 2 0 1.65 1.80 voltage (V) 1.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 002aad155 45 IDD(act) (mA) 60 MHz 35 48 MHz 25 15 12 MHz 5 -40 -15 10 35 60 temperature (°C) 85 Test conditions: Active mode entered executing code from on-chip flash; PCLK = CCLK⁄4; core voltage 1.8 V; all peripherals disabled. Fig 11. Typical LPC2114/01 and LPC2124/01 IDD(act) measured at different temperatures 002aad156 6.0 IDD(idle) (mA) 5.0 60 MHz 4.0 48 MHz 3.0 2.0 1.0 12 MHz 0.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 002aad157 200 IDD(pd) (μA) 1.95 V 1.8 V 1.65 V 160 120 80 40 0 -40 -15 10 35 60 temperature (°C) 85 Test conditions: Power-down mode entered executing code from on-chip flash. Fig 13. Typical LPC2114/01 and LPC2124/01 core power-down current IDD(pd) measured at different temperatures Table 8. Typical LPC2114/01 and LPC2124/01 peripheral power consumption in active mode Core voltage 1.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 9. Dynamic characteristics Table 9. Dynamic characteristics Tamb = 40 C to +85 C for industrial applications; VDD(1V8), VDD(3V3) over specified ranges.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 9.1 Timing tCHCL tCHCX tCLCH tCLCX Tcy(clk) 002aaa907 Fig 14. External clock timing (with an amplitude of at least Vi(RMS) = 200 mV) LPC2114_2124 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 10 June 2011 © NXP B.V. 2011. All rights reserved.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 10. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 c y X A 48 33 49 32 ZE e E HE A A2 (A 3) A1 wM θ bp pin 1 index 64 Lp L 17 detail X 16 1 ZD e v M A wM bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 10.1 9.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 11. Abbreviations Table 10.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 12. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes LPC2114_2124 v.7 20110614 Product data sheet 201004021F LPC2114_2124 v.6 Modifications: LPC2114_2124 v.6 Modifications: • Table 6 “Static characteristics”; Changed /01 Power-down mode supply current (IDD(pd)) from 180 A to 500 A for industrial temperature range.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements.
LPC2114/2124 NXP Semiconductors Single-chip 16/32-bit microcontrollers 15. Contents 1 2 2.1 2.2 3 3.1 4 5 5.1 5.2 6 6.1 6.2 6.3 6.4 6.5 6.5.1 6.6 6.7 6.7.1 6.7.2 6.8 6.8.1 6.8.2 6.9 6.9.1 6.9.2 6.10 6.10.1 6.11 6.11.1 6.11.2 6.12 6.12.1 6.13 6.13.1 6.13.2 6.14 6.14.1 6.15 6.15.1 6.16 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Key features brought by LPC2114/2124/01 devices . . . . . . . . . . . . . . . . . . . . . . .