Datasheet

LPC2109_2119_2129 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 14 June 2011 5 of 46
NXP Semiconductors
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
5. Pinning information
5.1 Pinning
(1) No TD2 and RD2 for LPC2109.
(2) Pin configuration is identical for devices with and without /00 and /01 suffixes.
Fig 2. Pin configuration
LPC2109
LPC2119
LPC2129
(2)
P0[21]/PWM5/CAP1[3] P1[20]/TRACESYNC
P0[22]/CAP0[0]/MAT0[0] P0[17]/CAP1[2]/SCK1/MAT1[2]
P0[23]/RD2
(1)
P0[16]/EINT0/MAT0[2]/CAP0[2]
P1[19]/TRACEPKT3 P0[15]/RI1/EINT2
P0[24]/TD2
(1)
P1[21]/PIPESTAT0
V
SS
V
DD(3V3)
V
DDA(3V3)
V
SS
P1[18]/TRACEPKT2 P0[14]/DCD1/EINT1
P0[25]/RD1 P1[22]/PIPESTAT1
TD1 P0[13]/DTR1/MAT1[1]
P0[27]/AIN0/CAP0[1]/MAT0[1] P0[12]/DSR1/MAT1[0]
P1[17]/TRACEPKT1 P0[11]/CTS1/CAP1[1]
P0[28]/AIN1/CAP0[2]/MAT0[2] P1[23]/PIPESTAT2
P0[29]/AIN2/CAP0[3]/MAT0[3] P0[10]/RTS1/CAP1[0]
P0[30]/AIN3/EINT3/CAP0[0] P0[9]/RXD1/PWM6/EINT3
P1[16]/TRACEPKT0 P0[8]/TXD1/PWM4
V
DD(1V8)
P1[27]/TDO
V
SS
V
DDA(1V8)
P0[0]/TXD0/PWM1 XTAL1
P1[31]/TRST XTAL2
P0[1]/RXD0/PWM3/EINT0 P1[28]/TDI
P0[2]/SCL/CAP0[0] V
SSA
V
DD(3V3)
V
SSA(PLL)
P1[26]/RTCK RESET
V
SS
P1[29]/TCK
P0[3]/SDA/MAT0[0]/EINT1 P0[20]/MAT1[3]/SSEL1/EINT3
P0[4]/SCK0/CAP0[1] P0[19]/MAT1[2]/MOSI1/CAP1[2]
P1[25]/EXTIN0 P0[18]/CAP1[3]/MISO1/MAT1[3]
P0[5]/MISO0/MAT0[1] P1[30]/TMS
P0[6]/MOSI0/CAP0[2] V
DD(3V3)
P0[7]/SSEL0/PWM2/EINT2 V
SS
P1[24]/TRACECLK V
DD(1V8)
002aad173
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49