Datasheet

LPC2109_2119_2129 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 7 — 14 June 2011 4 of 46
NXP Semiconductors
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
4. Block diagram
(1) Shared with GPIO.
(2) When test/debug interface is used, GPIO/other functions sharing these pins are not available.
(3) Only 1 for LPC2109.
(4) SSP interface and high-speed GPIO are available on LPC2109/01, LPC2119/01, and LPC2129/01 only.
Fig 1. Block diagram
SCL
(1)
P0[30:27],
P0[25:0]
TRST
(2)
TMS
(2)
TCK
(2)
TDI
(2)
TDO
(2)
XTAL2
XTAL1
SCK0
(1)
MOSI0
(1)
MISO0
(1)
EINT[3:0]
(1)
AIN[3:0]
(1)
SSEL0
(1)
RXD[1:0]
(1)
AHB BRIDGE
PLL
PWM0
ARM7TDMI-S
LPC2109
LPC2119
LPC2129
RESET
4 × CAP0
(1)
4 × CAP1
(1)
4 × MAT0
(1)
TD[2:1]
(1)
RD[2:1]
(1)
4 × MAT1
(1)
P1[31:16]
P0[30:27],
P0[25:0]
P1[31:16]
SDA
(1)
TXD[1:0]
(1)
DSR1
(1)
, CTS1
(1)
,
RTS1
(1)
, DTR1
(1)
,
DCD1
(1)
, RI1
(1)
RTCK
ARM7 LOCAL BUS
INTERNAL
SRAM
CONTROLLER
INTERNAL
FLASH
CONTROLLER
8/16 kB
SRAM
64/128/256 kB
FLASH
EXTERNAL
INTERRUPTS
CAPTURE/
COMPARE
TIMER 0/TIMER 1
A/D CONVERTER
GENERAL
PURPOSE I/O
CAN INTERFACE 1 AND 2
ACCEPTANCE FILTERS
(3)
TEST/DEBUG
INTERFACE
EMULATION TRACE
MODULE
AMBA Advanced High-performance
Bus (AHB)
system
clock
SYSTEM
FUNCTIONS
VECTORED
INTERRUPT
CONTROLLER
AHB
DECODER
I
2
C-BUS SERIAL
INTERFACE
AHB TO APB
BRIDGE
APB
DIVIDER
SPI0 SERIAL
INTERFACE
SCK1
(1)
MOSI1
(1)
MISO1
(1)
SSEL1
(1)
SPI1/SSP
(4)
SERIAL
INTERFACE
UART0/UART1
WATCHDOG
TIMER
SYSTEM
CONTROL
REAL-TIME CLOCK
002aad172
V
DD(3V3)
V
SS
V
DD(1V8)
PWM[6:1]
(1)
HIGH-SPEED
GPI/O
(4)
46 PINS TOTAL