Datasheet

LPC178X_7X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 9 September 2014 7 of 122
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
5. Block diagram
(1) Not available on all parts. See Table 2.
Fig 1. Block diagram
SRAM
96/80/40 kB
ARM
CORTEX-M3
TEST/DEBUG
INTERFACE
EMULATION
TRACE MODULE
FLASH
ACCELERATOR
FLASH
512/256/128/64 kB
GPDMA
CONTROLLER
I-code
bus
D-code
bus
system
bus
AHB TO
APB
BRIDGE 0
HIGH-SPEED
GPIO
AHB TO
APB
BRIDGE 1
4032 B/
2048 B
EEPROM
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
clocks and
controls
JTAG
interface
debug
port
SSP0/2
USART4
(1)
UART2/3
SYSTEM CONTROL
SSP1
UART0/1
I
2
C0/1
CAN 0/1
TIMER 0/1
WINDOWED WDT
12-bit ADC
PWM0/1
PIN CONNECT
GPIO INTERRUPT CONTROL
RTC
BACKUP REGISTERS
EVENT RECORDER
32 kHz
OSCILLATOR
APB slave group 1
APB slave group 0
RTC POWER DOMAIN
LPC178x/7x
master
ETHERNET
(1)
master
USB
DEVICE/
HOST
(1)
/OTG
(1)
master
002aaf528
slave
slave
CRC
slave
slave
slave
slave
ROM
EMC
slaveslave
LCD
(1)
slave
MULTILAYER AHB MATRIX
I
2
C2
TIMER2/3
DAC
I
2
S
QUADRATURE ENCODER
(1)
MOTOR CONTROL PWM
MPU
SD/MMC
(1)
= connected to GPDMA