Datasheet

DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 74 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
11.8 QEI timing
[1] Typical ratings are not guaranteed. The values listed are for room temperature (25 C), V
DD
= 3.3 V, typical
samples.
[2] T
cy(clk)
= one clock cycle of the system clock.
11.9 SCT output timing
Table 21. QEI dynamic characteristics
Simulated parameters sampled at the 50 % level of the falling or rising edge. Signal properties allow
the signal to be captured by the QEI. Additional digital filtering is required.
Symbol Parameter Conditions Min Typ
[1]
Unit
t
I(L)
input LOW time for pin functions QEI_PHA,
QEI_PHB, QEI_IDX
[2]
- 1 x T
cy(clk)
-
t
I(H)
input HIGH time for pin functions QEI_PHA,
QEI_PHB, QEI_IDX
[2]
- 1 x T
cy(clk)
-
t
d
delay time minimum overlap between
QEI_PHA and QEI_PHB
- 1 x T
cy(clk)
-
Fig 37. QEI timing diagram
QEI_PHA
QEI_PHB
t
I(L)
t
I(H)
t
d
Table 22. SCT output dynamic characteristics
T
amb
=  40  C to 105  C; 2.4 V <= V
DD
<= 3.6 V C
l
= 10 pF. Simulated skew (over process, voltage,
and temperature) of any two SCT fixed-pin output signals; sampled at the 50 % level of the falling or
rising edge; values guaranteed by design.
Symbol Parameter Conditions Min Typ Max Unit
t
sk(o)
output skew time SCTimer0/PWM - - 4 ns
SCTimer1/PWM - - 3 ns
SCTimer2/PWM - - 1 ns
SCTimer3/PWM - - 2 ns