Datasheet

DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 57 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
10.1 Power consumption
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions:
• Configure all pins as GPIO with pull-up resistor disabled in the IOCON block.
• Configure GPIO pins as outputs using the GPIO DIR register.
• Write 1 to the GPIO CLR register to drive the outputs LOW.
Conditions: T
amb
= 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL0/1 registers; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled; low-current mode.
1 MHz - 6 MHz: IRC enabled; PLL disabled.
12 MHz: IRC enabled; PLL disabled.
24 MHz to 72 MHz: IRC enabled; PLL enabled.
Fig 16. Active mode: Typical supply current I
DD
versus supply voltage V
DD
aaa-0011384
2.4 2.6 2.8 3 3.2 3.4 3.6
0
4
8
12
16
20
V
DD
(V)
I
DD
DD
I
DD
(mA)
(mA)
(mA)
1 MHz
1 MHz
1 MHz
6 MHz
6 MHz
6 MHz
12 MHz
12 MHz
12 MHz
24 MHz
24 MHz
24 MHz
36 MHz
36 MHz
36 MHz
48 MHz
48 MHz
48 MHz
60 MHz
60 MHz
60 MHz
72 MHz
72 MHz
72 MHz