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LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 18 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
7. Functional description
7.1 ARM Cortex-M3 processor
The ARM Cortex-M3 is a general purpose, 32-bit microprocessor, which offers high
performance and very low power consumption. The ARM Cortex-M3 offers many new
features, including a Thumb-2 instruction set, low interrupt latency, hardware division,
hardware single-cycle multiply, interruptible/continuable multiple load and store
instructions, automatic state save and restore for interrupts, tightly integrated interrupt
controller, and multiple core buses capable of simultaneous accesses.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM Cortex-M3 processor is described in detail in the Cortex-M3 Technical
Reference Manual, which is available on the official ARM website.
SCT3_OUT0 O SCTimer3/PWM output 0.
SCT3_OUT1 O SCTimer3/PWM output 1.
SCT3_OUT2 O SCTimer3/PWM output 2.
SCT_ABORT0 I SCT abort 0.
SCT_ABORT1 I SCT abort 1.
ADC0_PINTRIG0 I ADC0 external pin trigger input 0.
ADC0_PINTRIG1 I ADC0 external pin trigger input 1.
ADC1_PINTRIG0 I ADC1 external pin trigger input 0.
ADC1_PINTRIG1 I ADC1 external pin trigger input 1.
DAC_PINTRIG I DAC external pin trigger input.
DAC_SHUTOFF I DAC shut-off external input.
ACMP0_O O Analog comparator 0 output.
ACMP1_O O Analog comparator 1 output.
ACMP2_O O Analog comparator 2 output.
ACMP3_O O Analog comparator 3 output.
CLKOUT O Clock output.
ROSC O Analog comparator ring oscillator output.
ROSC_RESET I Analog comparator ring oscillator reset.
USB_FTOGGLE O USB frame toggle. Do not assign this function to a pin until a USB
device is connected and the first SOF interrupt has been received
by the device.
QEI_PHA I QEI phase A input.
QEI_PHB I QEI phase B input.
QEI_IDX I QEI index input.
GPIO_INT_BMAT O Output of the pattern match engine.
SWO O Serial wire output.
Table 4. Movable functions
…continued
Function name Type Description