Datasheet

DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
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DRAFT
D
RAFT
DRA
LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 15 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
PIO1_27 - - 50
[5]
I; PU IO PIO1_27 — General purpose port 1 input/output 27.
PIO1_28 - - 55
[5]
I; PU IO PIO1_28 — General purpose port 1 input/output 28.
PIO1_29 - - 56
[5]
I; PU IO PIO1_29 — General purpose port 1 input/output 29.
PIO1_30 - - 59
[5]
I; PU IO PIO1_30 — General purpose port 1 input/output 30.
PIO1_31 - - 60
[5]
I; PU IO PIO1_31 — General purpose port 1 input/output 31.
PIO2_0 - - 62
[5]
I; PU IO PIO2_0 — General purpose port 2 input/output 0.
PIO2_1 - - 64
[5]
I; PU IO PIO2_1 — General purpose port 2 input/output 1.
PIO2_2 - - 72
[5]
I; PU IO PIO2_2 — General purpose port 2 input/output 2.
PIO2_3 - - 76
[5]
I; PU IO PIO2_3 — General purpose port 2 input/output 3.
PIO2_4 - - 77
[5]
I; PU IO PIO2_4 — General purpose port 2 input/output 4.
On the LQFP100 package, this is the ISP_1 boot pin.
PIO2_5 - - 80
[5]
I; PU IO PIO2_5 — General purpose port 2 input/output 5.
On the LQFP100 package, this is the ISP_0 boot pin.
PIO2_6 - - 82
[5]
I; PU IO PIO2_6 — General purpose port 2 input/output 6.
On the LQFP100 package, this pin is assigned to U0_TXD
in ISP USART mode.
PIO2_7 - - 86
[5]
I; PU IO PIO2_7 — General purpose port 2 input/output 7.
On the LQFP100 package, this pin is assigned to
U0_RXD in ISP USART mode.
PIO2_8 - - 92
[5]
I; PU IO PIO2_8 — General purpose port 2 input/output 8.
On the LQFP100 package, this pin is assigned to
CAN0_TD in ISP C_CAN mode.
PIO2_9 - - 94
[5]
I; PU IO PIO2_9 — General purpose port 2 input/output 9.
On the LQFP100 package, this pin is assigned to
CAN0_RD in ISP C_CAN mode.
PIO2_10 - - 96
[5]
I; PU IO PIO2_10 — General purpose port 2 input/output 10.
PIO2_11 - - 99
[5]
I; PU IO PIO2_11 — General purpose port 2 input/output 11.
PIO2_12 35 47 74
[5]
I; PU IO PIO2_12 — General purpose port 2 input/output 12. On
parts LPC1519/17/18 only.
PIO2_13 36 48 75
[5]
I; PU IO PIO2_13 — General purpose port 2 input/output 13. On
parts LPC1519/17/18 only.
USB_DP 35 47 74
[10]
- IO USB bidirectional D+ line. Pad includes internal 33 
series termination resistor. On parts LPC1549/48/47 only.
USB_DM 36 48 75
[10]
- IO USB bidirectional D line. Pad includes internal 33 
series termination resistor. On parts LPC1549/48/47 only.
RTCXIN 31 42 66
[9]
- RTC oscillator input. This input should be grounded if the
RTC is not used.
RTCXOUT 32 43 67
[9]
- RTC oscillator output.
XTALIN 26 36 54
[9]
- Input to the oscillator circuit and internal clock generator
circuits. Input voltage must not exceed 1.8 V.
XTALOUT 25 35 53
[9]
- Output from the oscillator amplifier.
VBAT 30 41 65 - Battery supply voltage.
Table 3. Pin description
Symbol
LQFP48 LQFP64 LQFP100
Reset
state
[1]
Type Description