Datasheet

DRAFT
DRAFT DRAFT DR
DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 12 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
PIO0_13/ADC1_6
21 29 43
[2]
I; PU IO PIO0_13 — General purpose port 0 input/output 13.
On the LQFP64 package, this pin is assigned to U0_RXD
in ISP USART mode.
On the LQFP48 package, this pin is assigned to
CAN0_RD in ISP C_CAN mode.
A ADC1_6 — ADC1 input 6.
PIO0_14/ADC1_7/
SCT1_OUT5
22 30 45
[2]
I; PU IO PIO0_14 — General purpose port 0 input/output 14.
On the LQFP48 package, this pin is assigned to U0_RXD
in ISP USART mode.
A ADC1_7 — ADC1 input 7.
O SCT1_OUT5 — SCTimer1/PWM output 5.
PIO0_15/ADC1_8
23 31 47
[2]
I; PU IO PIO0_15 — General purpose port 0 input/output 15.
On the LQFP48 package, this pin is assigned to U0_TXD
in ISP USART mode.
A ADC1_8 — ADC1 input 8.
PIO0_16/ADC1_9
24 32 49
[2]
I; PU IO PIO0_16 — General purpose port 0 input/output 16.
On the LQFP48 package, this is the ISP_1 boot pin.
A ADC1_9 — ADC1 input 9.
PIO0_17/WAKEUP/
TRST
28 39 61
[4]
I; PU IO PIO0_17 — General purpose port 0 input/output 17. In
boundary scan mode: TRST (Test Reset).
This pin triggers a wake-up from Deep power-down mode.
If you need to wake up from Deep power-down mode via
an external pin, do not assign any movable function to this
pin. Pull this pin HIGH externally while in Deep
power-down mode. Pull this pin LOW to exit Deep
power-down mode. A LOW-going pulse as short as 50 ns
wakes up the part.
PIO0_18/
SCT0_OUT5
13 17 26
[5]
I; PU IO PIO0_18 — General purpose port 0 input/output 18.
On the LQFP64 package, this pin is assigned to U0_TXD
in ISP USART mode.
On the LQFP48 package, this pin is assigned to
CAN0_TD in ISP C_CAN mode.
O SCT0_OUT5 — SCTimer0/PWM output 5.
SWCLK/
PIO0_19/TCK
29 40 63
[5]
I; PU I SWCLK — Serial Wire Clock. SWCLK is enabled by
default on this pin.
In boundary scan mode: TCK (Test Clock).
IO PIO0_19 — General purpose port 0 input/output 19.
SWDIO/
PIO0_20/SCT1_OUT6/
TMS
33 44 69
[5]
I; PU I/O SWDIO — Serial Wire Debug I/O. SWDIO is enabled by
default on this pin.
In boundary scan mode: TMS (Test Mode Select).
I/O PIO0_20 — General purpose port 0 input/output 20.
O SCT1_OUT6 — SCTimer1/PWM output 6.
Table 3. Pin description
Symbol
LQFP48
LQFP64
LQFP100
Reset
state
[1]
Type Description