Datasheet

DRAFT DRAFT DRAFT DR DRAFT DRAFT DRAFT
D
RAF
DRAFT DRAFT DRA
F
T D
RAFT DR
AFT D
DRA
F
T DRAFT DRAFT
D
RAFT
DRAFT
D
RAFT
DRA
LPC15xx All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved.
Objective data sheet Rev. 1.0 — 16 January 2014 11 of 98
NXP Semiconductors
LPC15xx
32-bit ARM Cortex-M3 microcontroller
Table 3. Pin description
Symbol
LQFP48 LQFP64 LQFP100
Reset
state
[1]
Type Description
PIO0_0/ADC0_10/
SCT0_OUT3
122
[2]
I; PU IO PIO0_0 — General purpose port 0 input/output 0.
A ADC0_10 — ADC0 input 10.
O SCT0_OUT3 — SCTimer0/PWM output 3.
PIO0_1/ADC0_7/
SCT0_OUT4
256
[2]
I; PU IO PIO0_1 — General purpose port 0 input/output 1.
A ADC0_7 — ADC0 input 7.
O SCT0_OUT4 — SCTimer0/PWM output 4.
PIO0_2/ADC0_6/
SCT1_OUT3
368
[2]
I; PU IO PIO0_2 — General purpose port 0 input/output 2.
ADC0_6 — ADC0 input 6.
O SCT1_OUT3 — SCTimer1/PWM output 3.
PIO0_3/ADC0_5/
SCT1_OUT4
4710
[2]
I; PU IO PIO0_3 — General purpose port 0 input/output 3.
A ADC0_5 — ADC0 input 5.
O SCT1_OUT4 — SCTimer1/PWM output 4.
PIO0_4/ADC0_4 5813
[2]
I; PU IO PIO0_4 — General purpose port 0 input/output 4. This is
the ISP_0 boot pin for the LQFP48 package.
A ADC0_4 — ADC0 input 4.
PIO0_5/ADC0_3 6914
[2]
I; PU IO PIO0_5 — General purpose port 0 input/output 5.
A ADC0_3 — ADC0 input 3.
PIO0_6/ADC0_2/
SCT2_OUT3
71016
[2]
I; PU IO PIO0_6 — General purpose port 0 input/output 6.
A ADC0_2 — ADC0 input 2.
O SCT2_OUT3 — SCTimer2/PWM output 3.
PIO0_7/ADC0_1 81117
[2]
I; PU IO PIO0_7 — General purpose port 0 input/output 7.
A ADC0_1 — ADC0 input 1.
PIO0_8/ADC0_0/TDO 9 12 19
[2]
I; PU IO PIO0_8 — General purpose port 0 input/output 8.
In boundary scan mode: TDO (Test Data Out).
A ADC0_0 — ADC0 input 0.
PIO0_9/ADC1_1/TDI 12 16 24
[2]
I; PU IO PIO0_9 — General purpose port 0 input/output 9.
In boundary scan mode: TDI (Test Data In).
A ADC1_1 — ADC1 input 1.
PIO0_10/ADC1_2 15 19 28
[2]
I; PU IO PIO0_10 — General purpose port 0 input/output 10.
A ADC1_2 — ADC1 input 2.
PIO0_11/ADC1_3 18 23 33
[2]
I; PU IO PIO0_11 — General purpose port 0 input/output 11.
On the LQFP64 package, this pin is assigned to
CAN0_RD in ISP C_CAN mode.
A ADC1_3 — ADC1 input 3.
PIO0_12/DAC_OUT 19 24 35
[3]
I; PU IO PIO0_12 — General purpose port 0 input/output 12. If this
pin is configured as a digital input, the input voltage level
must not be higher than V
DDA
.
A DAC_OUT — DAC analog output.