Datasheet

LPC1315_16_17_45_46_47 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 20 September 2012 59 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
11. ADC electrical characteristics
[1] Select the ADC low-power mode by setting the LPWRMODE bit in the ADC CR register. See the LPC1315/16/17/45/46/47 user manual.
[2] The ADC is monotonic, there are no missing codes.
[3] The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See Figure 27.
[4] The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 27
.
[5] The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 27
.
[6] ADCOFFS value (bits 7:4) = 2 in the ADC TRM register. See the LPC1315/16/17/45/46/47 user manual.
[7] The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 27
.
[8] The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See Figure 27
.
[9] See Figure 27
.
[10] The conversion frequency corresponds to the number of samples per second.
Table 17. ADC characteristics
V
DDA
= 2.7 V to 3.6 V; T
amb
=
40
C to +85
C unless otherwise specified; 12-bit resolution.
Symbol Parameter Conditions Min Typ Max Unit
V
IA
analog input voltage 0 - V
DDA
V
C
ia
analog input capacitance - 5 - pF
I
DDA(ADC)
ADC analog supply current on pin V
DDA
(LQFP64
package only)
low-power mode
[1]
-5-A
during ADC
conversions
-350-A
E
D
differential linearity error
[2][3]
--1LSB
E
L(adj)
integral non-linearity
[4]
--5LSB
E
O
offset error
[5][6]
--2.5 LSB
E
G
gain error
[7]
--0.3 %
E
T
absolute error
[8]
--7LSB
R
vsi
voltage source interface
resistance
[9]
-1-k
f
clk(ADC)
ADC clock frequency - - 15.5 MHz
f
c(ADC)
ADC conversion frequency
[10]
--500kHz