Datasheet
LPC1315_16_17_45_46_47 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 3 — 20 September 2012 13 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
SWCLK/PIO0_10/SCK0/
CT16B0_MAT2
38 29 19
[3]
I; PU I SWCLK — Serial wire clock and test clock TCK for JTAG
interface.
-I/OPIO0_10 — General purpose digital input/output pin.
-OSCK0 — Serial clock for SSP0.
-OCT16B0_MAT2 — Match output 2 for 16-bit timer 0.
TDI/PIO0_11/AD0/
CT32B0_MAT3
42 32 21
[6]
I; PU I TDI — Test Data In for JTAG interface.
-I/OPIO0_11 — General purpose digital input/output pin.
-IAD0 — A/D converter, input 0.
-OCT32B0_MAT3 — Match output 3 for 32-bit timer 0.
TMS/PIO0_12/AD1/
CT32B1_CAP0
44 33 22
[6]
I; PU I TMS — Test Mode Select for JTAG interface.
-I/OPIO_12 — General purpose digital input/output pin.
-IAD1 — A/D converter, input 1.
-ICT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
TDO/PIO0_13/AD2/
CT32B1_MAT0
45 34 23
[6]
I; PU O TDO — Test Data Out for JTAG interface.
-I/OPIO0_13 — General purpose digital input/output pin.
-IAD2 — A/D converter, input 2.
-OCT32B1_MAT0 — Match output 0 for 32-bit timer 1.
TRST
/PIO0_14/AD3/
CT32B1_MAT1
46 35 24
[6]
I; PU I TRST — Test Reset for JTAG interface.
-I/OPIO0_14 — General purpose digital input/output pin.
-IAD3 — A/D converter, input 3.
-OCT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO/PIO0_15/AD4/
CT32B1_MAT2
52 39 25
[6]
I; PU I/O SWDIO — Serial wire debug input/output.
-I/OPIO0_15 — General purpose digital input/output pin.
-IAD4 — A/D converter, input 4.
-OCT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO0_16/AD5/
CT32B1_MAT3/WAKEUP
53 40 26
[7]
I; PU I/O PIO0_16 — General purpose digital input/output pin.
-IAD5 — A/D converter, input 5.
-OCT32B1_MAT3 — Match output 3 for 32-bit timer 1.
-IWAKEUP — Deep power-down mode wake-up pin with
20 ns glitch filter. This pin must be pulled HIGH externally
to enter Deep power-down mode and pulled LOW to exit
Deep power-down mode. A LOW-going pulse as short as
50 ns wakes up the part.
PIO0_17/RTS
/
CT32B0_CAP0/SCLK
60 45 30
[3]
I; PU I/O PIO0_17 — General purpose digital input/output pin.
-ORTS
— Request To Send output for USART.
-ICT32B0_CAP0 — Capture input 0 for 32-bit timer 0.
-I/OSCLK — Serial clock input/output for USART in
synchronous mode.
Table 3. Pin description (LPC1315/16/17 - no USB)
Symbol
LQFP64
LQFP48
HVQFN33
Reset state
[1]
Type
Description