Datasheet

LPC1311_13_42_43 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 6 June 2012 39 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
9.2 BOD static characteristics for LPC1300L series (LPC1311/01 and
LPC1313/01)
Remark: Applies to parts LPC1311/01 and LPC1313/01 and all packages.
[1] Interrupt levels are selected by writing the level value to the BOD control register BODCTRL, see LPC13xx
user manual.
9.3 Power consumption for LPC1300 series
Remark: Applies to parts LPC1311/13/42/43 and all their packages.
Power measurements in Active, Sleep, and Deep-sleep modes were performed under the
following conditions (see LPC13xx user manual):
• Configure all pins as GPIO with pull-up resistor disabled in the IOCONFIG block.
• Configure GPIO pins as outputs using the GPIOnDIR registers.
• Write 0 to all GPIOnDATA registers to drive the outputs LOW.
Table 10. BOD static characteristics
[1]
T
amb
=25°C.
Symbol Parameter Conditions Min Typ Max Unit
V
th
threshold voltage interrupt level 0
assertion - 1.65 - V
de-assertion - 1.80 - V
interrupt level 1
assertion - 2.22 - V
de-assertion - 2.35 - V
interrupt level 2
assertion - 2.52 - V
de-assertion - 2.66 - V
interrupt level 3
assertion - 2.80 - V
de-assertion - 2.90 - V
reset level 0
assertion - 1.46 - V
de-assertion - 1.63 - V
reset level 1
assertion - 2.06 - V
de-assertion - 2.15 - V
reset level 2
assertion - 2.35 - V
de-assertion - 2.43 - V
reset level 3
assertion - 2.63 - V
de-assertion - 2.71 - V