Datasheet

LPC1311_13_42_43 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 5 — 6 June 2012 35 of 74
NXP Semiconductors
LPC1311/13/42/43
32-bit ARM Cortex-M3 microcontroller
[1] Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages.
[2] For LPC1342 and LPC1343 only: For USB operation 3.0 V ≤ V
DD
≤ 3.6 V. Guaranteed by design.
[3] IRC enabled; system oscillator disabled; system PLL disabled.
[4] I
DD
measurements were performed with all pins configured as GPIO outputs driven LOW and pull-up resistors disabled.
[5] BOD disabled.
[6] All peripherals disabled in the SYSAHBCLKCTRL register. Peripheral clocks to UART, SSP, trace clock, and SysTick timer disabled in
the syscon block.
[7] For LPC1342/43: USB_DP and USB_DM pulled LOW externally.
[8] IRC disabled; system oscillator enabled; system PLL enabled.
[9] All oscillators and analog blocks turned off in the PDSLEEPCFG register; PDSLEEPCFG = 0x0000 0FFF.
[10] WAKEUP pin pulled HIGH externally. An external pull-up resistor is required on the RESET
pin for the Deep power-down mode.
[11] Low-current mode PWR_LOW_CURRENT selected when running the set_power routine in the power profiles.
[12] Including voltage on outputs in 3-state mode.
[13] V
DD
supply voltage must be present.
[14] 3-state outputs go into 3-state mode in Deep power-down mode.
[15] Allowed as long as the current limit does not exceed the maximum current allowed by the device.
[16] To V
SS
.
[17] 3.0 V ≤ V
DD
≤ 3.6 V.
[18] Includes external resistors of 33 Ω±1 % on USB_DP and USB_DM.
[1] The ADC is monotonic, there are no missing codes.
[2] The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See Figure 8.
V
OH
HIGH-level output
voltage
driven; for low-/full-speed;
R
L
of 15 kΩ to GND
[17]
2.8 - 3.5 V
C
trans
transceiver capacitance pin to GND
[17]
--20pF
Z
DRV
driver output
impedance for driver
which is not high-speed
capable
with 33 Ω series resistor; steady state
drive
[18][17]
36 - 44.1 Ω
Table 7. Static characteristics
…continued
T
amb
= −40 °C to +85 °C, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
Table 8. ADC static characteristics
T
amb
= −40 °C to +85 °C unless otherwise specified; ADC frequency 4.5 MHz, V
DD
= 2.5 V to 3.6 V.
Symbol Parameter Conditions Min Typ Max Unit
V
IA
analog input voltage 0 - V
DD
V
C
ia
analog input capacitance - - 1 pF
E
D
differential linearity error
[1][2]
--±1LSB
E
L(adj)
integral non-linearity
[3]
--±1.5 LSB
E
O
offset error
[4]
--±3.5 LSB
E
G
gain error
[5]
--0.6%
E
T
absolute error
[6]
--±4LSB
R
vsi
voltage source interface
resistance
--40kΩ
R
i
input resistance
[7][8]
--2.5MΩ