Datasheet

LPC12D27 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 20 September 2011 7 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
6. Pinning information
6.1 Pinning
Fig 4. Pin configuration LQFP100 package
LPC12D27
SWDIO/PIO0_25 S29
SWCLK/PIO0_26 S28
PIO0_27 S27
PIO0_28 S26
PIO0_29 S25
PIO0_0 S24
PIO0_1 S23
PIO0_2 S22
PIO0_3 S21
PIO0_4 S20
PIO0_5 S19
PIO0_6 S18
PIO0_7 S17
PIO0_8 S16
RESET/PIO0_13 S10
PIO0_14 S9
PIO0_15 S8
PIO0_16 S7
PIO0_17
PIO0_9
PIO2_0
PIO0_10
PIO0_11
PIO0_12
S6
S15
S14
S13
S12
S11
PIO0_18 S5
R/PIO0_30 PIO0_24 R/PIO0_31 PIO0_23
R/PIO1_0 PIO0_22
S34 PIO0_21 S35 PIO0_20 S36 PIO0_19 S37 VREF_CMP S38 XTALOUT S39 XTALIN
LCD_ SDA V
SSIO
LCD_ SCL V
DD(IO)
SYNC RTCXIN
CLK RTCXOUT
V
DD
V
DD(3V3)
BP3 PIO1_2
S0 R/PIO1_1 S1 S33 S2 S32 S3
V
SS(LCD)
V
LCD
BP0
BP2 BP1
S31 V
SS
PIO1_6 PIO1_5 PIO1_4 PIO1_3
S4 S30
002aag502
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
56
55
54
53
52
51
15
16
17
18
19
61
60
59
58
57
26 27 28 29 30 31 32 33 34 35 36 37 38 39 45 46 47 48 49 50
100
99 98 97 96 95 94 93 92 91 90 89 88 87 81 80 79 78 77
76
40 41 42 43 44
86 85 84 83 82