Datasheet

LPC12D27 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 20 September 2011 5 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
Fig 2. LPC12D27 block diagram (microcontroller)
ARM
CORTEX-M0
TEST/DEBUG
INTERFACE
MICRO DMA
CONTROLLER
system
bus
CLOCK
GENERATION,
POWER CONTROL,
SYSTEM
FUNCTIONS
XTALIN
XTALOUT
RESET
clocks and
controls
SWD
CRC
ENGINE
LPC1227
master
128 kB
FLASH
slave
8 kB
SRAM
slave
ROM
slave
slave
002aag501
GPIO ports
WINDOWED WDT
IOCONFIG
REAL-TIME CLOCK
SYSTEM CONTROL
CLKOUT
SSP/SPI
UART0 RS-485
I
2
C-bus
32-bit COUNTER/TIMER 0/1
SCK
SSEL
MISO
MOSI
4 x MAT
4 x CAP
SDA
SCL
UART1
TXD1
RXD1
16-bit COUNTER/TIMER 0/1
2 x MAT
2 x CAP
RXD0
TXD0
DTR0, DSR0, CTS0,
DCD0, RI0, RTS0
10-bit ADC
MICRO DMA REGISTERS
COMPARATOR0/1
AD[7:0]
ACMP0/1_I[3:0]
ACMP0/1_O
VREF_CMP
AHB-LITE BUS
AHB-ABB
BRIDGE
HIGH-SPEED
GPIO
RTCXOUT
RTCXIN