Datasheet
LPC12D27 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 20 September 2011 34 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
11.2 Flash memory
[1] Erase and programming times are valid over the lifetime of the device (minimum 20000 cycles).
[2] Number of program/erase cycles.
11.3 External clock
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply
voltages.
Table 12. Dynamic characteristics: flash memory
T
amb
=
40
C to +85
C; V
DD(3V3)
over specified ranges.
Symbol Parameter Conditions Min Max Unit
t
er
erase time for one page (512 byte)
[1]
-20ms
for one sector (4 kB)
[1]
162 ms
for all sectors; mass
erase
[1]
-20ms
t
prog
programming
time
one word (4 bytes)
[1]
-49s
four sequential words
[1]
-194s
128 bytes (one row of 32
words)
[1]
-765s
N
endu
endurance
[2]
20000 - cycles
t
ret
retention time 10 - years
Table 13. Dynamic characteristics: external clock
T
amb
=
40
C to +85
C; V
DD(3V3)
over specified ranges.
[1]
Symbol Parameter Conditions Min Typ
[2]
Max Unit
f
osc
oscillator frequency 1 - 25 MHz
T
cy(clk)
clock cycle time 40 - 1000 ns
t
CHCX
clock HIGH time T
cy(clk)
0.4--ns
t
CLCX
clock LOW time T
cy(clk)
0.4--ns
t
CLCH
clock rise time - - 5 ns
t
CHCL
clock fall time - - 5 ns
Fig 20. External clock timing (with an amplitude of at least V
i(RMS)
= 200 mV)
t
CHCL
t
CLCX
t
CHCX
T
cy(clk)
t
CLCH
002aaa907