Datasheet

LPC12D27 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 20 September 2011 23 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
Conditions: T
amb
= 25 C; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 5. Active mode: Typical supply current I
DD
versus supply voltage V
DD(3V3)
for
different system clock frequencies (all peripherals disabled)
Conditions: V
DD(3V3)
= 3.3 V; active mode entered executing code while(1){} from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 6. Active mode: Typical supply current I
DD
versus temperature for different system
clock frequencies (peripherals disabled)
V
DD(3V3)
(V)
3 3.63.43.2
002aag186
8
4
12
16
I
DD
(mA)
0
33 MHz
(2)
24 MHz
(2)
12 MHz
(1)
4 MHz
(3)
1 MHz
(3)
12 MHz
(1)
4 MHz
(3)
1 MHz
(3)
33 MHz
(2)
24 MHz
(2)
002aag023
temperature (°C)
-40 853510 60-15
4
12
8
16
I
DD
(mA)
0