Datasheet
LPC12D27 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 20 September 2011 15 of 46
NXP Semiconductors
LPC12D27
32-bit ARM Cortex-M0 microcontroller
7.2.2 Functional description
The PCF8576D is a versatile peripheral device interfacing the LPC1227 microcontroller
with a wide variety of LCDs. It can directly drive any static or multiplexed LCD containing
up to four backplanes and up to 40 segments.
The possible display configurations of the PCF8576D depend on the number of active
backplane outputs required. A selection of display configurations is shown in Table 4
. The
integration of the LPC1227 microcontroller with the PCF8576D is shown in Figure 1
.
7.2.3 Reset state of the LCD controller and pins
After power-on, the LCD controller resets to the following starting conditions:
• All backplane and segment outputs are set to V
LCD
.
• The selected drive mode is 1:4 multiplex with 1/3 bias.
• Blinking is switched off.
• Input and output bank selectors are reset.
• The I
2
C-bus interface is initialized.
• The data pointer and the subaddress counter are cleared (set to logic 0).
• The display is disabled.
Remark: Do not transfer data on the
I
2
C-bus for at least 1 ms after a power-on to allow the
reset action to complete.
7.2.4 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of
three impedances connected in series between V
LCD
and V
SS(LCD)
. The middle resistor
can be bypassed to provide a 1/2 bias voltage level for the 1:2 multiplex configuration. The
LCD voltage can be temperature compensated externally using the supply to pin V
LCD
.
7.2.5 Oscillator
7.2.5.1 Internal clock
The internal logic of the PCF8576D and its LCD drive signals are timed either by its
internal oscillator or by an external clock. The internal oscillator is enabled by connecting
pin OSC to pin V
SS(LCD)
. If the internal oscillator is used, the output from pin CLK can be
used as the clock signal for several PCF8576Ds in the system that are connected in
cascade.
Table 4. Selection of display configurations
Number of Digits/Characters
Backplanes Segments 7-segment 14-segment Dot matrix/Elements
4 160 20 10 160 (4 40)
3 120 15 7 120 (3 40)
2 80 10 5 64 (2 40)
1405240 (1 40)