LPC122x 32-bit ARM Cortex-M0 microcontroller; up to 128 kB flash and 8 kB SRAM Rev. 2 — 26 August 2011 Product data sheet 1. General description The LPC122x extend NXP's 32-bit ARM microcontroller continuum and target a wide range of industrial applications in the areas of factory and home automation. Benefitting from the ARM Cortex-M0 Thumb instruction set, the LPC122x have up to 50 % higher code density compared to common 8/16-bit microcontroller performing typical tasks.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122X Product data sheet Crystal oscillator with an operating range of 1 MHz to 25 MHz. 12 MHz Internal RC (IRC) oscillator trimmed to 1 % accuracy that can optionally be used as a system clock. PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 3. Applications eMetering Lighting Industrial networking Alarm systems White goods 4. Ordering information Table 1. Ordering information Type number Package Name Description Version LPC1227FBD64/301 LQFP64 LQFP64: plastic low profile quad flat package; 64 leads; body 10 10 1.4 mm SOT314-2 LPC1226FBD64/301 LQFP64 LQFP64: plastic low profile quad flat package; 64 leads; body 10 10 1.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 4.1 Ordering options Table 2.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 5.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 6. Pinning information 49 R/PIO1_1 50 PIO1_2 51 PIO1_3/WAKEUP 52 PIO1_4 53 PIO1_5 54 PIO1_6 55 VSS 56 VDD(3V3) 57 RTCXOOUT 58 RTCXIN 59 PIO2_8 60 PIO2_9 61 PIO2_10 62 PIO2_11 63 VDD(IO) 64 VSSIO 6.
LPC122x NXP Semiconductors 37 R/PIO1_1 38 PIO1_2 39 PIO1_3/WAKEUP 40 PIO1_4 41 PIO1_5 42 PIO1_6 43 VSS 44 VDD(3V3) 45 RTCXOUT 46 RTCXIN 47 VDD(IO) 48 VSSIO 32-bit ARM Cortex-M0 microcontroller XTALIN 1 36 R/PIO1_0 XTALOUT 2 35 R/PIO0_31 VREF_CMP 3 34 R/PIO0_30 PIO0_19 4 33 PIO0_18 PIO0_20 5 PIO0_21 6 PIO0_22 7 30 PIO0_15 PIO0_23 8 29 PIO0_14 PIO0_24 9 28 RESET/PIO0_13 32 PIO0_17 31 PIO0_16 LPC122x PIO0_9 24 PIO0_8 23 PIO0_7 22 PIO0_6 21 PIO0_5 20 PIO0_4 19 PIO
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 6.2 Pin description All pins except the supply pins can have more than one function as shown in Table 3. The pin function is selected through the pin’s IOCON register in the IOCONFIG block. The multiplexed functions (see Table 4) include the counter/timer inputs and outputs, the UART receive, transmit, and control functions, and the serial wire debug functions.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122x pin description …continued PIO0_7/CTS0/ CT32B1_CAP1/ CT32B1_MAT1 22 26 PIO0_8/RXD1/ CT32B1_CAP2/ CT32B1_MAT2 PIO0_9/TXD1/ CT32B1_CAP3/ CT32B1_MAT3 PIO0_10/SCL [2] yes [3] 23 27 [2] yes [3] 24 28 [2] yes [3] 25 37 PIO0_11/SDA/ CT16B0_CAP0/ CT16B0_MAT0 26 38 PIO0_12/CLKOUT/ CT16B0_CAP1/ CT16B0_MAT1 27 39 RESET/PIO0_13 Start Type Reset Description logic state [1] input Pin LQFP64 Symbol Pin LQFP48 Table 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122x pin description …continued PIO0_17/MOSI 32 44 Start Type Reset Description logic state [1] input Pin LQFP64 Symbol Pin LQFP48 Table 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122x pin description …continued PIO0_27/ACMP0_O 12 12 [9] 13 17 [9] PIO0_28/ACMP1_O/ CT16B0_CAP0/ CT16B0_MAT0 PIO0_29/ROSC/ CT16B0_CAP1/ CT16B0_MAT1 R/PIO0_30/AD0 Start Type Reset Description logic state [1] input Pin LQFP64 Symbol Pin LQFP48 Table 3. 14 18 34 46 [9] [6] no no no no I/O I; PU PIO0_27 — General purpose digital input/output pin (high-current output driver). O - ACMP0_O — Output for comparator 0.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122x pin description …continued PIO1_5/AD7/ CT16B1_CAP0/ CT16B1_MAT0 41 53 PIO1_6/ CT16B1_CAP1/ CT16B1_MAT1 Start Type Reset Description logic state [1] input Pin LQFP64 Symbol Pin LQFP48 Table 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Symbol Pin LQFP64 LPC122x pin description …continued Pin LQFP48 Table 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LPC122x pin description …continued VDD(IO) 47 63 - I - Input/output supply voltage. VDD(3V3) 44 56 - I - 3.3 V supply voltage to the internal regulator and the ADC. Also used as the ADC reference voltage. VSSIO 48 64 - I - Ground. VSS 43 55 - I - Ground. Pin LQFP64 Symbol Pin LQFP48 Table 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 4.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 4.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller AHB peripherals 0x5008 0000 LPC122x 4 GB CRC 7 0xFFFF FFFF 3 - 6 reserved reserved 0x5003 0000 0xE010 0000 private peripheral bus 0xE000 0000 reserved 0x5008 0000 AHB peripherals 2 GPIO PIO2 1 GPIO PIO1 0 GPIO PIO0 APB peripherals 0x5000 0000 reserved 0x4000 0000 reserved 0x1FFF 2000 8 kB boot ROM 0x1FFF 0000 reserved 0x1FFE 2000 8 kB custom ROM 0x5000 0000 0x4008 0000 21 comparator 0/1 20 RTC 19 micro DMA regi
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller • In the LPC122x, the NVIC supports 32 vectored interrupts. In addition, up to 12 of the individual GPIO inputs are NVIC-vector capable. • Four programmable interrupt priority levels with hardware priority level masking. • Software interrupt generation. • Non-maskable Interrupt (NMI) can be programmed to use any of the peripheral interrupts. The NMI is not available on an external pin. 7.5.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller • Supports memory-to-memory, memory-to-peripheral, and peripheral-to-memory transfers. • Supports multiple DMA cycle types and multiple DMA transfer widths. • Performs all DMA transfers using the single AHB-Lite burst type. 7.8 CRC engine The Cyclic Redundancy Check (CRC) engine with programmable polynomial settings supports several CRC standards commonly used. To save system power and bus bandwidth, the CRC engine supports DMA transfers.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 7.10.1 Features • • • • 16-byte Receive and Transmit FIFOs. Register locations conform to 16C550 industry standard. Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B. Built-in fractional baud rate generator covering wide range of baud rates without a need for external crystals of particular values. • Auto-baud capabilities and FIFO control mechanism that enables software flow control implementation.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller • Bidirectional data transfer between masters and slaves. • Multi-master bus (no central master). • Arbitration between simultaneously transmitting masters without corruption of serial data on the bus. • Serial clock synchronization allows devices with different bit rates to communicate via one serial bus. • Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller • Comparator outputs connect to two timers, allowing for the recording of comparison event time stamps. 7.15 General purpose external event counter/timers The LPC122x includes two 32-bit counter/timers and two 16-bit counter/timers. The counter/timer is designed to count cycles of the system derived clock. It can optionally generate interrupts or perform other actions at specified timer values, based on four match registers.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller • Selectable time period from (Tcy(WDCLK) 256 4) to (Tcy(WDCLK) 224 4) in multiples of Tcy(WDCLK) 4. • The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator (IRC) or the Watchdog oscillator. This gives a wide range of potential timing choices of Watchdog operation under different power reduction conditions.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller main clock CLOCK DIVIDER AHB clock 0 (system) system clock AHB clocks 1 to 31 (memories and peripherals) 31 SYSAHBCLKCTRL[1:31] (AHB clock enable) 3 CLOCK DIVIDER 7 CLOCK DIVIDER peripheral clocks (SSP, UART0, UART1) peripheral clocks (IOCONFIG glitch filter) CLOCK DIVIDER IRC oscillator RTC oscillator 1 Hz clock RTC oscillator 1 Hz delayed clock RTC oscillator 1 kHz clock watchdog oscillator MAINCLKSEL (main clock select) SY
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller The system oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be boosted to a higher frequency, up to the maximum CPU operating frequency, by the system PLL. The ARM processor clock frequency is referred to as CCLK elsewhere in this document. 7.18.1.3 Watchdog oscillator The watchdog oscillator can be used as a clock source that directly drives the CPU, the watchdog timer, or the CLKOUT pin.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller In Sleep mode, execution of instructions is suspended until either a reset or interrupt occurs. Peripheral functions continue operation during Sleep mode and may generate interrupts to cause the processor to resume execution. Sleep mode eliminates dynamic power used by the processor itself, memory systems and related controllers, and internal buses. 7.18.5.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller An external pull-up resistor is required on the RESET pin if Deep power-down mode is used. 7.19.3 Brownout detection The LPC122x includes four levels for monitoring the voltage on the VDD(3V3) pin. If this voltage falls below one of the four selected levels, the BOD asserts an interrupt signal to the NVIC.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 7.20 Emulation and debugging Debug functions are integrated into the ARM Cortex-M0. Serial wire debug is supported. 7.21 Integer division routines The LPC122x contain performance-optimized integer division routines with support for up to 32-bit width in the numerator and denominator. Routines for signed and unsigned division and division with remainder are available. The integer division routines are ROM-based to reduce code-size.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134).[1] Symbol Parameter Conditions VDD(3V3) supply voltage (3.3 V) VDD(IO) input/output supply voltage VI input voltage on all digital pins [2] on pins PIO0_10 and PIO0_11 (I2C-bus pins) IDD supply current Min Max Unit 3.0 3.6 V 3.0 3.6 V 0.5 +3.6 V 0 5.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 9. Thermal characteristics 9.1 Thermal characteristics The average chip junction temperature, Tj (C), can be calculated using the following equation: T j = T amb + P D R th j – a (1) • Tamb = ambient temperature (C), • Rth(j-a) = the package junction-to-ambient thermal resistance (C/W) • PD = sum of internal and I/O power dissipation The internal power dissipation is the product of IDD and VDD.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10. Static characteristics Table 7. Static characteristics Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit VDD(IO) input/output supply voltage on pin VDD(IO) 3.0 3.3 3.6 V VDD(3V3) supply voltage (3.3 V) 3.0 3.3 3.6 V IDD supply current CCLK = 12 MHz - 4.6 - mA CCLK = 24 MHz - 9 - mA CCLK = 33 MHz - 12.2 - mA CCLK = 12 MHz - 6.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 7. Static characteristics …continued Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter VIL LOW-level input voltage Vhys hysteresis voltage VOH HIGH-level output voltage VOL IOH LOW-level output voltage HIGH-level output current Conditions Min Typ[1] Max Unit - - 0.3VDD(I V O) - 0.4 - V low mode; IOH = 2 mA VDD(IO) 0.4 - - V high mode; IOH = 4 mA VDD(IO) 0.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Table 7. Static characteristics …continued Tamb = 40 C to +85 C, unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit IOH HIGH-level output current low mode; VOH = VDD(IO) 0.7 20 - - mA high mode; VOH = VDD(IO) 0.7 28 - - mA VOL = 0.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.1 Peripheral power consumption The supply current per peripheral is measured as the difference in supply current between the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both registers and no code is executed. Measured on a typical sample at Tamb = 25 C and VDD(3V3) = 3.3 V. Table 8.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag186 16 IDD (mA) 33 MHz(2) 12 24 MHz(2) 8 12 MHz 4 (1) 4 MHz(3) (3) 1 MHz 0 3 3.2 3.4 3.6 VDD(3V3) (V) Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled. (1) System oscillator and system PLL disabled; IRC enabled.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag187 16 33 MHz(2) IDD (mA) 12 24 MHz 8 (2) 12 MHz(1) 4 MHz(3) (3) 1 MHz 4 0 3 3.2 3.4 3.6 VDD(3V3) (V) Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals enabled in the SYSAHBCLKCTRL register. (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag188 5 33 MHz IDD (mA) (2) 4 24 MHz(2) 3 2 1 12 MHz (1) 4 MHz(3) 1 MHz(3) 0 3.0 3.2 3.4 3.6 VDD(3V3) (V) Conditions: VDD(3V3) = 3.3 V; sleep mode entered from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled. (1) System oscillator and system PLL disabled; IRC enabled.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag189 1.0 IDD (μA) 0.9 0.8 VDD(3V3) = 3.6 V 3.3 V 3.0 V 0.7 0.6 -40 -15 10 35 60 85 temperature (°C) Fig 12. Deep power-down mode: Typical supply current IDD versus temperature for different supply voltages VDD(3V3) 10.3 Electrical pin characteristics 002aag175 3.6 VOH (V) 3.2 low mode -40 °C +25 °C +70 °C +85 °C low mode -40 °C +25 °C +70 °C +85 °C 2.8 2.4 2 0 16 32 48 IOH (mA) Conditions: VDD(IO) = 3.3 V Fig 13.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag310 1.2 VOL (V) high mode -40 °C +25 °C +70 °C +85 °C low mode -40 °C +25 °C +70 °C +85 °C 0.8 0.4 0 0 16 32 48 IOL (mA) Conditions: VDD(IO) = 3.3 V Fig 14. High-drive pins: Typical LOW-level output voltage VOL versus LOW-level output current IOL 002aag180 0.8 VOL (V) -40 °C +25 °C +70 °C +85 °C 0.6 0.4 0.2 0 0 12 24 36 48 IOL (mA) Conditions: VDD(IO) = 3.3 V. Fig 15.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag181 1.2 VOL (V) -40 °C +25 °C +70 °C +85 °C low mode high mode -40 °C +25 °C +70 °C +85 °C 0.8 0.4 0 0 4 8 12 16 IOL (mA) Conditions: VDD(IO) = 3.3 V. Fig 16. Normal-drive pins: Typical LOW-level output voltage VOL versus LOW-level output current IOL 002aag182 3.4 high mode VOH (V) 3.0 -40 °C +25 °C +70 °C +85 °C low mode -40 °C +25 °C +70 °C +85 °C 2.6 2.2 1.8 0 4 8 12 16 IOH (mA) Conditions: VDD(IO) = 3.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 002aag185 0 Ipu (mA) -20 -40 +85 °C +70 °C +25 °C -40 °C -60 -80 -100 0 1 2 3 VI (mA) Conditions: VDD(IO) = 3.3 V. Fig 18. Typical pull-up current Ipu versus input voltage VI LPC122X Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 26 August 2011 © NXP B.V. 2011. All rights reserved.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.4 ADC characteristics Table 9. ADC static characteristics Tamb = 40 C to +85 C unless otherwise specified; ADC frequency 9 MHz, VDD(3V3) = 3.0 V to 3.6 V. Parameter VIA analog input voltage 0 - VDD(3V3) V Cia analog input capacitance - - 1 pF ED differential linearity error [2][3][4] - - 1 LSB integral non-linearity [2][5] - - 2.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller offset error EO gain error EG 1023 1022 1021 1020 1019 1018 (2) 7 code out (1) 6 5 (5) 4 (4) 3 (3) 2 1 LSB (ideal) 1 0 1 2 3 4 5 6 7 1018 1019 1020 1021 1022 1023 1024 VIA (LSBideal) offset error EO 1 LSB = VDD(3V3) − VSS 1024 002aae787 (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity error (ED). (4) Integral non-linearity (EL(adj)).
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 10.5 BOD static characteristics Table 10. BOD static characteristics[1] Tamb = 25 C. Symbol Parameter Conditions Vth threshold voltage interrupt level 1 Min Typ Max Unit assertion - 2.25 - V de-assertion - 2.39 - V assertion - 2.54 - V de-assertion - 2.67 - V assertion - 2.83 - V de-assertion - 2.93 - V assertion - 2.04 - V de-assertion - 2.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11. Dynamic characteristics 11.1 Power-up ramp conditions Table 11. Power-up characteristics Tamb = 40 C to +85 C. Symbol Parameter tr rise time twait wait time VI input voltage Conditions Min at t = t1: 0 < VI 400 mV [1] [1][2] at t = t1 on pin VDD Typ Max Unit 0 - 500 ms 12 - - s 0 - 400 mV [1] See Figure 20.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11.2 Flash memory Table 12. Dynamic characteristic: flash memory Tamb = 40 C to +85 C; VDD(3V3) over specified ranges.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11.4 Internal oscillators Table 14. Dynamic characteristic: internal oscillators Tamb = 40 C to +85 C; VDD(3V3) over specified ranges.[1] Symbol Parameter Conditions Min Typ[2] Max Unit fosc(RC) internal RC oscillator frequency - 11.88 12 12.12 MHz [1] Parameters are valid over operating temperature range unless otherwise specified. [2] Typical ratings are not guaranteed. The values listed are at nominal supply voltages.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 11.5 I2C-bus Table 16. Dynamic characteristic: I2C-bus pins Tamb = 40 C to +85 C.[1] Symbol Parameter Conditions Min Max Unit fSCL SCL clock frequency Standard-mode 0 100 kHz [3][4][5][6] fall time tf Fast-mode 0 400 kHz Fast-mode Plus 0 1 MHz of both SDA and SCL signals - 300 ns Fast-mode 20 + 0.1 Cb 300 ns Fast-mode Plus - 120 ns Standard-mode 4.7 - s Fast-mode 1.3 - s Fast-mode Plus 0.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller tf SDA tSU;DAT 70 % 30 % 70 % 30 % tHD;DAT tf 70 % 30 % SCL tVD;DAT tHIGH 70 % 30 % 70 % 30 % 70 % 30 % tLOW S 1 / fSCL 002aaf425 Fig 23. I2C-bus pins clock timing LPC122X Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 2 — 26 August 2011 © NXP B.V. 2011. All rights reserved.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 12. Application information 12.1 XTAL input The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a clock in slave mode, it is recommended that the input be coupled through a capacitor with Ci = 100 pF. To limit the input voltage to the specified range, choose an additional capacitor to ground Cg which attenuates the input voltage by a factor Ci/(Ci + Cg).
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 12.3 ElectroMagnetic Compatibility (EMC) Radiated emission measurements according to the IEC61967-2 standard using the TEM-cell method are shown for the LPC1227FBD64/301 in Table 17. Table 17. ElectroMagnetic Compatibility (EMC) for part LPC1227FBD64/301 (TEM-cell method) VDD = 3.3 V; Tamb = 25 C. Parameter Frequency band System clock = Unit 12 MHz 24 MHz 33 MHz 150 kHz - 30 MHz 4.2 3.8 6.4 dBV 30 MHz - 150 MHz 7.3 5.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 13. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 c y X A 48 33 49 32 ZE e E HE A A2 (A 3) A1 wM θ bp pin 1 index 64 Lp L 17 detail X 16 1 ZD e v M A wM bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e mm 1.6 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 10.1 9.9 10.1 9.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm SOT313-2 c y X 36 25 A 37 24 ZE e E HE A A2 (A 3) A1 w M θ bp pin 1 index Lp L 13 48 detail X 12 1 ZD e v M A w M bp D B HD v M B 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HD HE L Lp v w y mm 1.6 0.20 0.05 1.45 1.35 0.25 0.27 0.17 0.18 0.12 7.1 6.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 14. Soldering Footprint information for reflow soldering of LQFP48 package SOT313-2 Hx Gx P2 Hy (0.125) P1 Gy By Ay C D2 (8×) D1 Bx Ax Generic footprint pattern Refer to the package outline drawing for actual layout solder land occupied area DIMENSIONS in mm P1 P2 0.500 0.560 Ax Ay 10.350 10.350 Bx By C D1 D2 Gx 7.350 7.350 1.500 0.280 0.500 7.500 Gy Hx Hy 7.500 10.650 10.650 sot313-2_fr Fig 27.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Footprint information for reflow soldering of LQFP64 package SOT314-2 Hx Gx P2 Hy (0.125) P1 Gy By Ay C D2 (8×) D1 Bx Ax Generic footprint pattern Refer to the package outline drawing for actual layout solder land occupied area DIMENSIONS in mm P1 0.500 P2 Ax Ay Bx By 0.560 13.300 13.300 10.300 10.300 C D1 D2 1.500 0.280 0.400 Gx Gy Hx Hy 10.500 10.500 13.550 13.550 sot314-2_fr Fig 28.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 15. Abbreviations Table 18.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 16. Revision history Table 19. Revision history Document ID Release date Data sheet status Change notice Supersedes LPC122X v.2 20110826 Product data sheet - LPC122X v.1.2 Modifications: LPC122X v.1.2 Modifications: LPC122X v.1.1 Modifications: LPC122X v.1 LPC122X Product data sheet • • • • • • • • • Power consumption data updated in Table 7. Power consumption graphs added in Section 10.2.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 17. Legal information 17.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications.
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 19. Contents 1 2 3 4 4.1 5 6 6.1 6.2 7 7.1 7.1.1 7.2 7.3 7.4 7.5 7.5.1 7.5.2 7.6 7.6.1 7.7 7.7.1 7.8 7.8.1 7.9 7.9.1 7.10 7.10.1 7.11 7.11.1 7.12 7.12.1 7.13 7.13.1 7.14 7.14.1 7.15 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . . . . . . . . . . . . . . .
LPC122x NXP Semiconductors 32-bit ARM Cortex-M0 microcontroller 17.4 18 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Contact information. . . . . . . . . . . . . . . . . . . . . 59 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved.