Datasheet

LPC122X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 26 August 2011 35 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
Conditions: T
amb
= 25 C; active mode entered executing code
while(1){}
from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 6. Active mode: Typical supply current I
DD
versus supply voltage V
DD(3V3)
for
different system clock frequencies (all peripherals disabled)
Conditions: V
DD(3V3)
= 3.3 V; active mode entered executing code
while(1){}
from flash; all
peripherals disabled in the SYSAHBCLKCTRL register; all peripheral clocks disabled; internal
pull-up resistors disabled; BOD disabled.
(1) System oscillator and system PLL disabled; IRC enabled.
(2) System oscillator and system PLL enabled; IRC disabled.
(3) System oscillator enabled; IRC and system PLL disabled.
Fig 7. Active mode: Typical supply current I
DD
versus temperature for different system
clock frequencies (peripherals disabled)