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LPC11E6X All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 1.2 — 21 May 2014 26 of 89
NXP Semiconductors
LPC11E6x
32-bit ARM Cortex-M0+ microcontroller
8.14 USART0
Remark: The LPC11E6x contains two distinctive types of UART interfaces: USART0 is
software-compatible with the USART interface on the LPC11E1x/3x parts. USART1 to
USART4 use a different register interface.
The USART0 includes full modem control, support for synchronous mode, and a smart
card interface. The RS-485/9-bit mode allows both software address detection and
automatic address detection using 9-bit mode.
The USART0 uses a fractional baud rate generator. Standard baud rates such as
115200 Bd can be achieved with any crystal frequency above 2 MHz.
8.14.1 Features
• Maximum USART0 data bit rate of 3.125 Mbit/s in asynchronous mode and 10 Mbit/s
in synchronous slave and master mode.
• 16 byte receive and transmit FIFOs.
• Register locations conform to 16C550 industry standard.
• Receiver FIFO trigger points at 1 B, 4 B, 8 B, and 14 B.
• Built-in fractional baud rate generator covering wide range of baud rates without a
need for external crystals of particular values.
• Fractional divider for baud rate control, auto baud capabilities and FIFO control
mechanism that enables software flow control implementation.
• Support for RS-485/9-bit mode.
• Support for modem control.
• Support for synchronous mode.
• Includes smart card interface.
• DMA support.
8.15 USART1/2/3/4
Remark: The LPC11E6x contains two distinctive types of UART interfaces: USART0 is
software-compatible with the USART interface on the LPC11E1x/LPC11E3x parts.
USART1 to USART4 use a different register interface to achieve the same UART
functionality except for modem and smart card control.
Remark: USART4 IS available only on part LPC11E68JBD100.
Interrupts generated by the USART1/2/3/4 peripherals can wake up the part from
Deep-sleep and power-down modes if the USART is in synchronous mode, the 32 kHz
mode is enabled, or the CTS interrupt is enabled. This wake-up mechanism is not
available with the USART0 peripheral.
8.15.1 Features
• Maximum bit rates of 3.125 Mbit/s in asynchronous mode and 10 Mbit/s in
synchronous mode.
• 7, 8, or 9 data bits and 1 or 2 stop bits